Design Verification SoC Lead

• Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
• Plan the verification of digital design blocks, including writing test plans, and other verification documents.
• Work closely with Architecture, Software, Design, and Physical Design stakeholders to make technical decisions and represent project status throughout the development process.
• Develop verification features and capabilities, and participate in RTL debug.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
• 10 years of experience working with hardware verification languages (e.g., System Verilog/Specman), design verification methodologies (e.g., Universal Verification Methodology (UVM)) and chip design flow.
• Experience in leading chip verification teams through the full lifecycle from concept to delivery.
• Experience in creating chip or subsystem design verification strategies and plans.

Preferred qualifications:

• 15 years of experience in verification of complex SoC/ASIC.
• 10 years of experience managing verification teams.
• Experience in chip design/verification of high performance AI/ML accelerators.
• Experience with industry verification techniques, including complementary techniques such as formal verification, and emulation.
• Experience in low power verification.

In this role, you will work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive cutting-edge distributed inference technology that powers real-time systems where latency and reliability are mission-critical.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
• 10 years of experience working with hardware verification languages (e.g., System Verilog/Specman), design verification methodologies (e.g., Universal Verification Methodology (UVM)) and chip design flow.
• Experience in leading chip verification teams through the full lifecycle from concept to delivery.
• Experience in creating chip or subsystem design verification strategies and plans.