Quantum Error Correction Scientist

eleQtron develops and operates full-stack quantum computers based on trapped-ion technology. Our approach combines laser schemes for cooling/initialization/readout, engineered magnetic-field gradient induced coupling (MAGIC) combined with microwave control for universal gate sets, and advanced quantum control techniques and dedicated firmware to work within the high-fidelity regime and below the error threshold of quantum error correction (QEC).

A central objective of our technology roadmap is the realization of fault-tolerant quantum computing. To achieve this goal, we combine the above high-fidelity quantum hardware with microscopic physics-based modelling, hardware–software co-design, advanced characterization and benchmarking techniques, and detailed numerical simulations to model system performance realistically and identify the optimal QEC strategy and the associated system requirements.

As part of our initiative towards fault-tolerant quantum computing, we are expanding our Foundations & Concepts team and are looking for a Quantum Error Correction Scientist (f/m/d) to help establish and grow this strategic activity within the company.

Role Overview:

As Quantum Error Correction Scientist (f/m/d), you will contribute to the development of QEC infrastructure, realistic circuit-level noise modelling, decoder benchmarking, logical-performance assessment, and hardware-aware quantum error-correction research.

The role offers the opportunity to join at an early stage of eleQtron’s QEC effort, helping to establish the infrastructure that will be key for realistic QEC studies and first logical-architecture demonstrations.

Responsibilities: 

• Build simulation and benchmarking infrastructure for realistic fault-tolerance studies based on hardware-derived noise models.

• Analyze logical performance, decoder strategies, resource requirements, and scaling behaviour of quantum error-correction architectures.

• Collaborate with system operators, architects, and application scientists to connect hardware characterization with logical-level performance assessments.

• Contribute to early logical-computing demonstrations and the development of eleQtron’s future fault-tolerance capabilities.