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Broadcom

Designs chips and software for data centers

Design Implementation Engineer - Synthesis / STA

Silicon & ASIC DesignPosted on Nov 10
Full-timeIn-person

About the Job

Requirements

  • Extensive experience with high-complexity silicon in advanced technology nodes.
  • Expertise with industry-standard tools for synthesis, static timing analysis, formal verification, and low-power audits, including Design Compiler, Genus, PrimeTime, Tempus, Formality, and VCLP.
  • Hands-on experience with hardware data management tools such as Git, DesignSync, or equivalent for managing complex, hierarchical IP releases.
  • Strong familiarity with UPF/CPF low-power design methodologies.
  • Experience developing custom automation tools using Tcl, Perl, or Python, and experience using AI code-assist tools to accelerate script generation and code debugging.
  • Experience with physical design implementation steps, including partitioning, floorplanning, placement, clock tree synthesis, routing, and physical verification (LVS/DRC using tools such as Calibre, ICC2, or Innovus), is a plus.
  • Experience with RTL design and architecture is a plus.
  • Contribution to successful tapeout or release deployment of at least 1–2 high-complexity ASICs/SoCs.
  • A BS in Electrical Engineering, Computer Engineering, or a related field with 8+ years of related experience, or an MS with 6+ years of related experience.

Responsibilities

  • Execute synthesis and run static checks, including CDC, RDC, and UPF/CPF power intent, for digital and mixed-signal blocks.
  • Create, validate, and maintain timing constraints; perform static timing analysis and define timing signoff methodologies, including corners and derating.
  • Run formal verification and logical equivalence checking throughout the design flow to ensure functional correctness.
  • Generate and implement timing and functional ECOs to drive timing closure, evaluating pre- and post-route quality of results.
  • Own IP release validation, audit files for synchronization gaps, and ensure proper tagging using revision control utilities before handing off to customers or SoC teams.
  • Build and deploy custom script-based automation to streamline implementation and audit tasks.

Desired Qualifications

  • Experience with physical design implementation steps, including partitioning, floorplanning, placement, clock tree synthesis, routing, and physical verification (LVS/DRC using tools such as Calibre, ICC2, or Innovus).
  • Experience with RTL design and architecture.

About the Company

Broadcom

Designs chips and software for data centers

Broadcom designs chips and sells infrastructure software for the companies that run large data centers, telecom networks and corporate IT. Its custom AI processors, built with cloud companies, and its Ethernet switch chips move and process data inside the computer clusters that train AI models. The chip business also makes parts for broadband, wireless, storage and industrial equipment, sold to device makers and cloud operators, while VMware software lets businesses run private clouds and is sold by subscription. Broadcom took its current form in 2016, when Avago Technologies, formed in 2005 from Agilent's chip unit, bought Broadcom Corporation, and it is based in Palo Alto, California.

Company size
10,001+
Company stage
IPO
Headquarters
Palo Alto, CA
Founded
2005

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