ASIC Digital Verification Design – Principal Engineer
Synopsys
ASIC Digital Verification Design – Principal Engineer
Synopsys
EDA software for chip design
We Are
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, from AI infrastructure and cloud computing to autonomous systems and next-generation communications.
As the leader in chip design, verification, and silicon IP, Synopsys enables the world's top semiconductor companies to accelerate innovation and bring groundbreaking products to market faster. Join us and help shape the future of technology.
The Opportunity
We're looking for an experienced ASIC Verification Engineer who is passionate about solving complex protocol challenges and delivering world-class Interface IP solutions.
In this role, you'll work on industry-leading PCIe, CXL, DDR, and Ethernet technologies that serve as foundational building blocks for AI accelerators, data centers, networking platforms, and next-generation SoCs. You'll collaborate with architects, design engineers, and verification experts to ensure the quality, performance, and reliability of technology used by leading semiconductor companies worldwide.
What You'll Do
Why This Role Matters
The Interface IP you help verify will be integrated into some of the world's most advanced semiconductor products. Your work will directly impact the performance, reliability, and success of technologies powering:
What You'll Bring
PCI Express (PCIe), Compute Express Link (CXL), DDR Memory Interfaces, Ethernet
Preferred
What Success Looks Like
The Team
You'll join a team of highly skilled verification engineers responsible for developing and verifying industry-leading Interface IP solutions. Working alongside experts in architecture, design, and verification, you'll tackle some of the semiconductor industry's most challenging technical problems while contributing to products deployed worldwide.
Why Synopsys
At Synopsys, you'll work on technology at the heart of the semiconductor ecosystem. Our IP, EDA, and silicon solutions enable innovation across AI, automotive, cloud computing, mobile, and high-performance computing markets.
Here, you'll have the opportunity to:
Rewards and Benefits
Synopsys offers a comprehensive package of health, wellness, financial, and professional development benefits designed to support you throughout your career.
#LI-SW1
At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.
In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.
Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.
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