C

Cisco

Makes networking gear and security software

ASIC DFT Technical Lead: Memory Built-In Self-Test

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeHsinchu, North District, Hsinchu City, TaiwanNo salary listedIn-person

About the Job

Requirements

  • At least 12 years of experience in Design for Test with a strong focus on Memory Built-In Self-Test.
  • Expert knowledge of Memory Built-In Self-Test architecture and structural Design for Test methodologies.
  • Extensive experience with Memory Built-In Self-Test controller design; post-silicon validation and custom Memory Built-In Self-Test algorithms; March algorithms and memory fault models; built-in self-repair and built-in redundancy analysis; and memory repair analysis.
  • Deep understanding of static random-access memory, read-only memory, register files, and custom embedded memory architectures.
  • Strong expertise in minimum-voltage issue debugging, silicon bring-up, post-silicon validation, yield debugging, failure analysis, and return merchandise authorization debugging.
  • Proficiency in Verilog or SystemVerilog and scripting in Python, Perl, or Tcl.
  • Knowledge of IEEE 1149.1, IEEE 1500, and IEEE 1687.

Responsibilities

  • Develop and optimize Memory Built-In Self-Test and memory-testing architecture.
  • Lead the hardware implementation of the defined architecture and methodology.
  • Develop and optimize Memory Built-In Self-Test controllers for static random-access memory, register files, read-only memory, and custom embedded memories.
  • Define and implement standard and custom Memory Built-In Self-Test algorithms based on memory architecture and product requirements.
  • Collaborate with memory compiler and intellectual-property teams to understand memory internals and optimize test architecture.
  • Lead tape-out sign-off for Memory Built-In Self-Test deliverables.
  • Debug minimum-voltage-related memory failures and optimize test methodologies for low-voltage operation.
  • Lead post-silicon bring-up, memory diagnostics, and failure analysis.
  • Improve yield by analyzing manufacturing test data and identifying systematic memory failures.
  • Support customer-returned devices through return merchandise authorization debugging and root-cause analysis.
  • Develop custom diagnostic algorithms for memories not supported by standard Memory Built-In Self-Test implementations.
  • Lead technical reviews across cross-functional teams.
  • Work closely with Design, Physical Design, Product Engineering, Reliability, and automatic test equipment teams to resolve silicon issues and improve product quality.

Desired Qualifications

  • Experience with advanced process nodes of 7 nanometers, 5 nanometers, 3 nanometers, or below.
  • Strong background in custom memory architectures and non-standard Memory Built-In Self-Test implementations.
  • Proven experience leading Design for Test teams and driving silicon debugging through production.
  • Strong problem-solving, technical leadership, and cross-functional communication skills.

About the Company

Cisco

Makes networking gear and security software

Cisco makes the switches and routers that connect offices, data centers, and cloud services, and it also sells cybersecurity tools and Webex video meetings to businesses and governments. It was one of the first companies to sell routers that let different kinds of computer networks exchange data, and in 2000 it briefly became the world's most valuable company. Customers run its network gear, from Wi-Fi access points to AI data center systems, with Cisco software that sets up and secures the network, while its Splunk unit searches computer logs to catch outages and attacks. Cisco earns money from hardware sales, software subscriptions, and support contracts. It was founded in 1984 and is based in San Jose, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1984

Recently Posted Jobs

Explore more opportunities at Cisco

See more jobs