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Synopsys

EDA software for chip design

ASIC Digital Design Senior Staff Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeUnited StatesIn-person

About the Job

Requirements

  • A PhD with 8 or more years, or an MSc with 10 or more years, of practical analog integrated-circuit design experience.
  • Experience with FinFET technologies and in-depth familiarity with transistor-level circuit design.
  • Extensive design experience with sub-circuits relevant to Memory, SerDes, and D2D, including receive equalizers, DAC-based transmitters, and high-speed clocking circuits.
  • Knowledge of ESD issues, custom digital design, and analog/digital interactions for optimizing circuit performance.
  • Proficiency with tools for schematic entry, physical layout, and design verification, and SPICE simulators, as well as scripting languages such as TCL, Perl, C, Python, and MATLAB.
  • Ability to work independently on new or special assignments with minimal oversight.
  • Ability to communicate effectively with parties within and outside the functional area.

Responsibilities

  • Review UCIe and other D2D standards to develop novel transceiver architectures and sub-block specifications.
  • Investigate and develop circuit architectures that address architectural bottlenecks and improve power, area, and performance targets.
  • Collaborate across geography, project, and department teams to streamline design and verification strategies and ensure overall design quality, efficiency, and performance.
  • Oversee PHY-level physical layout to minimize the effects of parasitics, device stress, and process variation.
  • Present and review simulation data from internal project teams and present results externally at industry panels or customer reviews.
  • Document design features and test plans; consult on the overall electrical characterization of the D2D IP product; analyze customer silicon data for design enhancements; and propose solutions for post-silicon design updates.

Desired Qualifications

  • The role may be eligible for an annual bonus, equity, and other discretionary bonuses.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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