A

Accenture

Advises businesses and runs their technology

Silicon Engineering Manager

Engineering LeadershipConfirmed live in the last 24 hours
Full-timeScottsdale, AZ, USANo salary listed

About the Job

Requirements

  • A bachelor's degree in Computer Science, Technology, Computer Information Systems, Computer Applications, Engineering, or a related field, plus 5 years of progressive post-baccalaureate experience in the IT consulting industry.
  • Five years of experience utilizing Hardware Description Languages, including SystemVerilog and C.
  • Five years of experience utilizing verification methodology, including Universal Verification Methodology.
  • Five years of scripting knowledge of Python, Unix, and YAML.
  • Five years of experience working with Gate Level Simulation.
  • Five years of experience working with industry-standard simulation and debug tools, including VCS, Questa, or Verdi.
  • Five years of experience utilizing computer architecture concepts, including NoC, memories, AMBA bus protocols (including AXI, APB, or AHB), and cache systems.
  • Five years of experience integrating and configuring third-party tools, including Synopsys and Cadence, into TestBench.
  • Five years of project planning experience, including identifying dependencies.
  • Willingness and ability to travel domestically approximately 80% of the time to meet client needs.

Responsibilities

  • Contribute to the development of Gate Level Simulation TestBench architecture and verification of ASIC design with provided Netlist by developing or enhancing TestBench, running simulation of testcase suites, and debugging failures.
  • Drive the definition of the TestPlan for RTL design through design specification.
  • Define, develop, and integrate testcases to successfully verify RTL design using SystemVerilog, Universal Verification Methodology, C, Python, and the associated methodology.
  • Work closely with design and architect engineers to define, develop, and integrate required TestBench developments for RTL functional verification.
  • Define, develop, and integrate functional coverage in the TestBench following Coverage Driven Verification methodology.
  • Contribute development of testcases in C to verify CPU-based transactions as per the TestPlan.
  • Define, develop, and integrate random constraints that generate random valid input stimulus during daily testcase regressions.
  • Supervise team execution and collaborate with client engineers, vendors, and SoC/SS teams to deliver functional verification requirements in a timely manner.

About the Company

Accenture

Advises businesses and runs their technology

Accenture advises large businesses and public agencies on strategy, builds their technology systems and runs ongoing operations. Its teams connect business planning with implementation, covering areas such as cloud migration, cybersecurity and customer experience. Consultants work with clients to redesign processes, while engineers integrate software from technology partners and maintain the resulting systems for multinational organizations. Clients pay for project work or continuing services, including application support and business processes such as finance and customer service. Accenture was founded in 1989 and has its headquarters in Dublin, Ireland.

Company size
10,001+
Company stage
IPO
Headquarters
Dublin, Ireland
Founded
1989

Recently Posted Jobs

Explore more opportunities at Accenture

See more jobs