Firmware Engineer
Bolt Graphics
Firmware Engineer
Bolt Graphics
Fabless GPU designer for path-traced rendering
Bolt Graphics is a semiconductor startup based in Sunnyvale, CA building the fastest and most efficient graphics processors. We pride ourselves on our first principles approach to solving problems. We are energized by our mission to reduce the barrier of entry for content creation and consumption. Our goal is to enable everyone to easily create, simulate and consume immersive experiences as vividly as they can imagine them.
Our Values
About the role:
We are seeking a talented and experienced firmware lead engineer to architect, develop, and bring up embedded firmware for advanced digital integrated circuits. You will collaborate closely with cross-functional teams to develop innovative solutions that meet customer requirements and industry standards.
The ideal candidate combines deep embedded firmware expertise with the ability to mentor engineers, review designs, coordinate cross-functional work, and ensure consistent, high-quality firmware delivery across all system components.
What you'll do:
Required Qualifications:
Preferred Qualifications:
Compensation Range: $180,000–$230,000 per year (California). This range represents the anticipated base pay for this role based in California; the final offer may vary based on qualifications, experience, and location.
Benefits:
Bolt is committed to building a diverse and inclusive environment in which we recognize and value each other’s differences as well as fostering a culture that promotes its core values: Professionalism, Integrity, and Respect. As an equal opportunity employer, all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, genetic information, national origin, age, disability, or status as a protected veteran.
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Fabless GPU designer for path-traced rendering
Bolt Graphics designs GPUs for rendering, high-performance computing, and gaming, focusing on professional workloads like visual effects, architecture visualization, scientific simulation and render farms. Its Zeus GPU architecture, announced in 2025, uses hardware-accelerated path tracing and FP64 compute, with a RISC-V core, expandable DDR5 memory on PCIe cards and servers, built-in high-speed Ethernet for direct GPU-to-GPU connections, and acceleration for electromagnetic wave simulation. This combination supports scalable deployments on PCIe cards, servers, and cloud platforms, without relying on AI upscaling.
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