Verification Engineering Lead/Manager
About the job
- Design, develop, and deploy Universal Verification Methodology-based testbenches for multi-core, multi-threaded processor subsystems and mixed-signal systems-on-chip.
- Have experience architecting chip-level testbenches and verifying systems-on-chip and chipsets using ARM or RISC-V processor technology.
- Have strong knowledge of digital design and two or three AMBA AHB, AXI, or APB-based systems-on-chip architectures, ADC/DAC, PCIe, Ethernet, CAN, and LPDDR interfaces.
- Have strong knowledge of Verilog, SystemVerilog, Universal Verification Methodology, and C/C++.
- Have experience using assertions, constrained-random generation, and functional and code coverage.
- Have knowledge of scripting languages such as Perl, Python, and Tcl, plus Linux shells, for verification automation and flows.
- Have analytical debugging and problem-solving skills, including the ability to identify and solve problems under tight schedule pressure.
- Hold a Bachelor of Science degree in Electrical Engineering with at least 3 years of experience, or a Master of Science degree in Electrical Engineering with at least 1 year of experience.
- Have knowledge of at least one high-speed interface, such as USB, MIPI, PCIe, Ethernet, or DisplayPort.
- Have knowledge of two or three peripheral interfaces, such as SDIO, UART, I2S, I2C, PWM, or SPI.
- Have experience managing a verification team.
- Have strong knowledge of ASIC simulation tools and verification languages, including sign-off simulators, Verdi, and Siloti.
- Be fluent in verification languages such as Universal Verification Methodology, Open Verification Methodology, SystemVerilog, Vera, and Verilog.
- Have experience writing test plans and creating directed and random test cases.
- Have strong scripting skills in Perl, Python, and Linux shells.
- Have strong analytical attention to detail and technical documentation skills.
- Have good written and verbal communication and interpersonal skills.
- Be self-motivated and able to work independently.
- Be willing to contribute to gaps in product development as needed.
- Lead the systems-on-chip and mixed-signal verification team and its efforts.
- Build a capable verification team and manage team tasks to achieve tape-out on schedule and move products to production with agreed-upon turns.
- Develop and sign off on test plans and test cases.
- Develop testbenches for analog and mixed-signal and functional-correctness simulations.
- Maintain power-intent format awareness.
- Develop tests to achieve more than 95% simulation coverage.
- Work with the design team to debug failures.
- Integrate and run built-in self-test and design-for-test gate-level simulations.
- Run code, line, toggle, and other coverage metrics.
- Run daily and weekly regressions and publish results.
- Own functional-correctness RTL and gate-level simulations.
- Mentor and lead a team of verification engineers.
- Work with systems and test engineering teams to validate parts and release them to production.
About the company
Omni Design Technologies delivers high-performance, ultra-low power IP cores for mixed-signal SoCs that power devices across 5G, LiDAR, automotive networks, AI, image sensing, and IoT. It develops and validates IP blocks and licenses them to chip makers, offering customization and support to ensure seamless integration into customer designs. The cores are designed to work on FinFET processes down to 28nm, with proven silicon such as gigasample low-power ADCs and DACs on TSMC 28nm. The company differentiates itself through validated, silicon-proven IP, deep collaboration with customers and partners (e.g., LeddarTech, MegaChips), and a global design footprint (new Fort Collins design center). Its goal is to enable customers to build sophisticated, power-efficient, mixed-signal SoCs quickly by providing ready-to-license IP plus engineering services that fit their specific needs.
Company Size
51-200
Company Stage
Series A
Total Funding
$35M
Headquarters
Milpitas, California
Founded
2015
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Simplify's Take
What believers are saying
- September 17, 2025 Series A raised over $35 million from CDIB-TEN and others.
- February 6, 2026 CPO development positions Omni for AI data-center interconnect demand.
- 2026 hiring added Hinesh Shah, Poh Sim Gan, and expanded European recruiting.
What critics are saying
- Omni sells IP, so delayed customer tape-outs directly defer revenue recognition.
- Broadcom, Marvell, and Astera Labs compress pricing in optical I/O and data-converter IP.
- If 3nm CPO adoption stalls, Omni remains a niche licensing shop with limited scale.
What makes Omni Design Technologies unique
- Omni Design builds ultra-low-power analog IP for 3nm and 28nm nodes.
- Its 200G-class CPO AFE targets 224Gb/s PAM4 with integrated TX driver and TIA.
- The company spans data converters, optical I/O, radar, and 5G/6G connectivity.
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Benefits
- Company Equity
- Performance Bonus