Formal Verification Engineer
Mirafra Technology
Formal Verification Engineer
Mirafra Technology
Turnkey ASIC design and semiconductor engineering
Experience with the following: - ASIC design process, digital design, design (hw/sw) verification tools and techniques, computer architecture, etc. -Design and assertion languages: VHDL, Verilog, System Verilog, and System Verilog Assertions (SVA), Experience with Formal Verification is a must
Experience in functional verification EDA tools: VCS, IUS, ModelSim, Jasper, 0-in, IFV, OneSpin, SLEC, etc is highly desired - Familiar with programming languages: C, C++, and SystemC - Scripting and automation skills: Unix/Linux shell programming, Perl, Java, Makefile, XML, XML DOM, XPath, XSLT, revision management (e.g. CVS, DesignSync, Subversion
All your information will be kept confidential according to EEO guidelines.
Turnkey ASIC design and semiconductor engineering
Mirafra Technologies delivers end-to-end turnkey ASIC design and semiconductor engineering services to help global tech companies move from concept to silicon to system. It covers the full lifecycle: architecture, design, verification, physical implementation, package/board design, embedded software, post-silicon validation, test and product engineering, and system solutions. With 2,200+ engineers and delivery centers worldwide, Mirafra has completed 650+ tape-outs for over 50 semiconductor customers, from startups to established firms. Its edge comes from a one-stop engineering partner model that combines deep domain expertise with scalable AI, cloud, data engineering, and software capabilities to speed time-to-market and reduce engineering complexity.
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