S

Synopsys

EDA software for chip design

Library Development Apprentice - Technical Engineering

Hardware Validation & TestingUpdated on Nov 6
Internship · Fall 2026Bengaluru, Karnataka, IndiaNo salary listed

About the Job

Requirements

  • A completed B.E./B.Tech in Electronics and Communication Engineering or a related field is mandatory.
  • Candidates must be fresh graduates from the class of 2026 or 2025.
  • Candidates must not currently be enrolled in or have completed an M-Tech program or postgraduate diploma.
  • Candidates must not be employed in a full-time position; limited internship experience is acceptable.
  • Candidates need a strong understanding of CMOS fundamentals, including MOSFET operation, inverter characteristics, delay, power dissipation, and leakage mechanisms.
  • Candidates need solid knowledge of digital logic design, including combinational and sequential circuits, and timing concepts such as setup, hold, recovery, and removal.
  • Candidates need familiarity with at least one circuit simulator, such as PrimeSim or FineSim, and the ability to read and debug transistor-level schematics.
  • Candidates should learn and apply concepts from Liberty format, Static Timing Analysis, and low-power design through real library development cycles.

Responsibilities

  • Run transistor-level simulations on digital standard cells using PrimeSim or FineSim to extract timing, power, and leakage data across PVT corners.
  • Analyze CMOS circuit behavior at the transistor level by reviewing schematics, debugging simulation failures, and identifying issues in logic implementation or device models.
  • Support characterization and validation of standard cell libraries by running automated flows, reviewing results, and flagging anomalies or quality issues.
  • Document simulation results and circuit-level observations in clear, structured reports for senior engineers.
  • Collaborate with library development engineers to improve characterization methodologies and refine automation scripts.
  • Learn and apply concepts from Liberty format, Static Timing Analysis, and low-power design through real library development cycles.

Desired Qualifications

  • Comfort working in Linux or Unix environments.
  • Basic scripting knowledge in Python, Perl, Tcl, or Shell.
  • Exposure to standard cell libraries, Liberty format, or Static Timing Analysis concepts.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

Recently Posted Jobs

Explore more opportunities at Synopsys

See more jobs