Senior Hardware Compute Architect
Black Semiconductor
Senior Hardware Compute Architect
Black Semiconductor
Graphene photonics enable optical chip interconnects
About us
We see the semiconductor industry as a realm of possibility. We see opportunity. We see the profound impact that our graphene solutions will have in transforming the industry. We invite you to join us in driving change with our fundamentally human-centered approach, uniting bright minds around a shared vision. The vision is: Prove to everybody that you can make a fundamental change. Prove with your knowledge and skills how things can be done differently. Together, we can change the paradigm of how the world connects
About our technology
The semiconductor industry’s growing demand for more powerful chips with higher bandwidth and lower power finds its solution in our technology. We connect chips to high-throughput, low-delay computing networks. The key lies in harnessing the physical properties of graphene to combine electronic computing with photonic communication, allowing countless chips to interact almost as if they were one. Our graphene photonic innovation increases computing power and efficiency to a new order of magnitude
In short, we connect chips to create powerful and energy-efficient networks, overcoming connectivity limitations in the semiconductor industry. We deliver the graphene solution
The Role
We are seeking a skilled Senior Hardware Compute Architect at Black Semiconductor to own the hardware architecture of our next-generation hybrid compute engine, combining electronic compute capabilities with photonic compute technologies. You will define the compute architecture, memory hierarchy, data fabric, and system interfaces that enable dynamic workload execution across electronic and photonic domains.
Working closely with the Architecture Lead, Senior Software Compute Architect, photonics teams, and downstream implementation teams, you will drive system-level architectural decisions by evaluating performance, power, area, and manufacturability trade-offs. Your work will translate workload requirements into an implementable hardware architecture for a new class of compute systems.
This role bridges compute architecture, heterogeneous system design, and electronic-photonic co-design.
To join our team, you should be excited to
Define the hardware architecture of a hybrid compute engine, including execution units (scalar, vector, tensor/matrix), memory hierarchy, memory tiering strategies, and the interfaces required to enable cooperation between electronic and photonic compute domains.
Architect the system data fabric and interconnect infrastructure, including bandwidth, latency, coherency, and die-to-die communication requirements using technologies such as UCIe-class links, CXL, UALink, and NVLink-class fabrics.
Partner with the Software Compute Architect to define hardware/software interfaces and workload mapping strategies, determining when operations should execute through electronic versus photonic compute paths.
Evaluate architectural options through quantitative modeling, analyzing performance, power, area, and scalability trade-offs to guide system-level decisions before silicon implementation.
Collaborate with photonics architecture, circuit design, RTL, physical design, and packaging teams to translate compute primitives into implementable system-level architectures.
Own the hardware architecture specification through sign-off, ensuring alignment between system requirements and downstream implementation teams.
Your Qualifications
Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent experience.
5+ years of experience designing compute hardware architecture at the SoC or system level, ideally involving heterogeneous computing, accelerators, or specialized compute architectures.
Deep expertise in compute architecture, including execution units (scalar, vector, tensor/matrix), workload mapping, memory hierarchy, and system-level architecture trade-offs.
Strong experience architecting high-performance interconnects, data fabrics, and heterogeneous compute systems, including technologies such as UCIe, CXL, UALink, NVLink-class, or comparable architectures.
Experience with architectural modeling and quantitative analysis of performance, power, area, and system scalability to guide hardware architecture decisions.
Proven ability to collaborate across hardware and software teams to define interfaces, requirements, and system-level design decisions.
Experience with architecture modeling and simulation tools, interconnect protocols, and system design workflows, including performance/power modeling environments, CXL, UALink, NVLink-class fabrics, UCIe, Python, C++, SystemC, and architecture specification tools used to develop implementable designs for RTL, physical design, and packaging teams.
Familiarity with photonic or optical compute concepts and their integration with electronic compute architectures will be considered a plus.
Experience with heterogeneous compute architectures involving GPUs, DPUs, FPGAs, custom accelerators, or AI accelerator platforms will be considered a plus.
Experience contributing to industry interconnect standards such as CXL Consortium, UALink, or UCIe Consortium will be considered a plus.
Our work culture
People Over Processes. At Black Semiconductor, flexibility is key—we ensure work adapts to life, not the other way around. We champion work-life harmony, where careers are meaningful and enriching. Our processes are human-centric, allowing you to focus on what matters
Let’s grow together. Your potential is our priority. We provide the autonomy to make a lasting impact and nurture your growth through a culture of continuous learning. We invest in your journey for professional and personal development
Your Health and Future Matter. Your well-being is paramount. We offer a comprehensive benefits package with outstanding insurance, pension and virtual stock options for your mental, physical, and financial health. Your peace of mind is our priority - in the present and future
We Live Openness. Collaboration and inclusivity are the cornerstones of our culture. We practice openness, fostering trust and respect. Individuality is our collective strength, fueling innovation and driving us forward
We connect chips – and people. We encourage qualified individuals from any background to apply. We foster an inclusive and supportive work environment that values collaboration, innovation, and growth. Join our team and be part of an organization dedicated to making a difference in the industry
If your application results in an employment relationship, your Applicant Data will be transferred to our personnel records and processed in accordance with applicable legal requirements; otherwise, your Applicant Data will be retained for up to six (6) months after completion of the recruitment process. Read more about our privacy policy here.
Graphene photonics enable optical chip interconnects
Black Semiconductor develops graphene-based photonics that integrate optical components into the outer layers of CMOS-like chips, enabling direct optical chip-to-chip communication. It works by using graphene as a translator to convert electronic signals to optical signals and back, so electrons on silicon can talk to photons through integrated photonic interconnects. This approach differs from traditional silicon photonics or pure electronic interconnects by being CMOS-compatible, wafer-scale, and capable of linking multiple chips as a single high-performance unit while reducing production steps by about 60%. The company aims to move from pilot production to mass manufacturing, building a 300mm wafer facility (FabONE) in Aachen, with pilot production by 2027 and mass production by 2031, backed by a large European funding round and investors.
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