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Astera Labs

Designs chips that connect data center systems

Analog/Mixed Signal System Test Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeSan Jose, CA, USA$150k - $175k /yrIn-person

About the Job

Requirements

  • A Bachelor's, Master's, or PhD degree in Electrical Engineering or a related field, completed or expected by the start date.
  • Strong fundamentals in transistor-level analog design, feedback and stability analysis, and noise and jitter analysis.
  • Strong analytical, problem-solving, communication, and documentation skills.

Responsibilities

  • Develop and execute system-test and validation activities for advanced-node CMOS products and high-speed electrical or optical interconnect circuits.
  • Bring up lab silicon, automate measurements, collect and analyze data, and debug performance issues to help determine root causes.
  • Characterize circuit behavior using appropriate laboratory equipment and measurement methods.
  • Build or improve Python, MATLAB, C, or similar scripts for test automation, data reduction, visualization, and repeatable analysis.
  • Partner with circuit designers and validation teams to translate performance targets into test plans, experiments, and actionable findings.
  • Document test methods, results, limitations, and recommendations in clear technical reports and presentations.
  • Contribute to debugging and improvement of mixed-signal systems while balancing measurement quality, schedule, and technical risk.
  • Share knowledge, participate in design and validation reviews, and help establish effective laboratory and documentation practices.

Desired Qualifications

  • Master's or PhD training in Electrical Engineering.
  • Hands-on experience through research, projects, internships, or coursework designing or validating high-speed mixed-signal circuits, including ADC/DAC data converters, RX front ends, TX drivers or serializers, low-jitter PLLs, TX/RX calibration, low-jitter clock distribution, or other high-speed analog circuits.
  • Experience with lab chip bring-up, automation, data collection, data analysis, and debugging.
  • Experience using lab equipment such as UXR oscilloscopes, DCA instruments, VNAs, PNAs, BERTs, or comparable measurement equipment.
  • Strong programming or scripting ability in Python, MATLAB, C, or comparable languages.
  • Design and tapeout experience in advanced CMOS nodes, such as 20 nm or newer.
  • Knowledge of optical transceivers, TIA design, and optical application drivers.
  • Experience with PCB design.
  • Familiarity with Verilog RTL or DSP design concepts.
  • Relevant research publications or patents in analog or RF IC design.

About the Company

Astera Labs

Designs chips that connect data center systems

Astera Labs designs chips and hardware modules that move data between processors, memory and accelerators in data centers. Its customers include cloud providers, chip vendors and equipment makers building servers and large computing clusters for AI and other workloads. Retimers restore signal quality, switches connect devices and memory controllers expand the memory available to computing systems, while COSMOS software monitors and manages these links. The company sells its products directly and through distributors, using outside manufacturers to fabricate and assemble its hardware. Astera Labs was founded in 2017 and is headquartered in San Jose, California.

Company size
501-1,000
Company stage
IPO
Headquarters
San Jose, CA
Founded
2017

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