Silicon Design Engineer

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THE ROLE:

We are looking for a hands-on automation engineer to drive the development and deployment of next-generation packaging design automation and AI-driven workflows. You will focus on accelerating the design of advanced heterogeneous integration technologies—specifically substrates, organic interposers, and bridge interconnects. AMD's environment is fast-paced, results-oriented, and built upon a legion of innovators with a passion for winning technology.

THE PERSON:

The successful candidate is a hands-on technical contributor who can bridge the gap between physical design requirements and software automation to build AI-driven workflows. He or she must have a drive for solutions and an aptitude to thrive in a multi-tasking environment, translating complex design challenges into scriptable, scalable workflows. They should possess good cross-functional collaboration skills to work across Design, EDA, and AI teams, with clear technical communication and documentation skills. Able to work effectively with minimal supervision and motivated to grow along the technical ladder.

KEY RESPONSIBILITIES:

• Develop, deploy, and maintain AI workflows for Substrate, Interposer, and Silicon Bridge design methodologies.
• Apply AI/ML methodologies to optimize critical design stages, including auto-routing, component placement, and signal integrity optimization.
• Work with EDA vendors and internal stakeholders to evaluate and implement next-generation features for 2.5D and 3D packaging.
• Contribute to the transition from manual design practices to "Agentic" and algorithmic design workflows.
• Collaborate with electrical and mechanical analysis teams to build closed-loop optimization systems that feed simulation results back into design construction.
• Document and report automation efficiency gains, ROI, and tool-capability improvements.
• Collaborate with cross-functional teams to support critical design tape-outs and methodology milestones.
• Share coding best practices and packaging knowledge with peers.

PREFERRED EXPERIENCE:

• Strong knowledge of EDA packaging design tools (Cadence APD/SiP, Siemens Xpedition, or Synopsys 3DIC/Compiler).
• Hands-on track record of developing automation using Python, Tcl, SKILL, or C++.
• Experience applying AI/ML frameworks (PyTorch, TensorFlow, etc.) to engineering or design problems.
• Familiarity with advanced packaging architectures (2.5D/3D, Chiplets, Fan-Out, Hybrid Bonding).
• Familiarity with design verification flows (DRC/LVS) and electrical extraction concepts.
• Experience automating Cadence Allegro package databases (SKILL) and/or SI/PI data workflows (e.g., PowerSI) is a plus.
• Good teamwork and interpersonal skills.

ACADEMIC CREDENTIALS:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with relevant packaging or CAD-automation experience.

#LI-SH1 

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.