Full-Time

ASIC Design Verification Engineer

AvicenaTech

AvicenaTech

51-200 employees

Modular optical interconnect platform enabling multi-Tbps

No salary listed

Sunnyvale, CA, USA

In Person

Category
Electrical Engineering (1)
Required Skills
Python
Perl
Requirements
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's degree acceptable as well.
Responsibilities
  • Testbench Development: Develop comprehensive and reusable verification environments (Testbenches) from scratch using advanced methodologies like UVM (Universal Verification Methodology).
  • Verification Planning: Work closely with the architecture and design teams to define and execute thorough verification plans, including feature lists, test strategies, and coverage goals.
  • Test Case Creation: Develop constrained-random, directed, and stress tests, as well as necessary sequences, scores, and functional coverage models.
  • Functional Debugging: Execute simulations, analyze results, and effectively debug complex functional failures, working with design engineers to identify and resolve root causes.
  • Coverage Closure: Drive functional and code coverage closure, identifying coverage holes and implementing targeted tests to achieve tape-out quality.
  • Regression Management: Maintain and manage regression suites, optimizing simulation speed and efficiency.
  • Formal Verification: Utilize formal verification techniques to prove correctness for critical design properties, such as clock domain crossing (CDC) and complex state machines.
  • Scripting and Automation: Develop and maintain automation scripts (e.g., in Python or Perl) to enhance the verification flow and improve efficiency.
Desired Qualifications
  • Experience verifying high-speed interfaces, SerDes, or communication protocols like Ethernet and PCIe.
  • Exposure to forward error correction (FEC), scrambling, and other digital data communication techniques.
  • Knowledge of formal verification tools (e.g., Synopsys VC Formal, Cadence JasperGold).
  • Familiarity with low-power verification techniques.
  • Experience with hardware description languages (HDL) like Verilog/SystemVerilog for basic design understanding.
  • Exposure to physical layer (PHY) or mixed-signal verification concepts.

AvicenaTech develops ultra low energy optical interconnects based on microLED technology. Its modular interconnect platform enables die-to-die links with multi-terabit per second (Tbps) data rates over medium-reach distances, designed for high-bandwidth computing needs. The product works by using microLED-based optical links to transmit data efficiently between dies, sensors, memory, and other components, forming a scalable, high-density interconnect fabric. Compared with competitors, AvicenaTech emphasizes higher bandwidth density and lower energy per bit through its microLED optical approach and a modular platform that can serve HPC, AI/ML workloads, memory disaggregation, as well as 5G, sensors, and aerospace applications. The company's goal is to provide energy-efficient, high-speed interconnects for data centers, HPC/AI ecosystems, and related semiconductor and telecommunications markets, enabling faster data movement and new system architectures.

Company Size

51-200

Company Stage

Series B

Total Funding

$96.5M

Headquarters

Mountain View, California

Founded

2019

Simplify Jobs

Simplify's Take

What believers are saying

  • Raised $65M Series B from Tiger Global and SK hynix, totaling $120M.
  • CEA Leti three-year lab-to-fab initiative launches January 2026 with Avicena.
  • LightBundle eKit available to partners March 2026, broader Q2 2026.

What critics are saying

  • Ayar Labs achieves sub-pJ/bit by Q4 2026, collapsing differentiation.
  • Nvidia standardizes Broadcom VCSEL CPO before Avicena design wins.
  • SK hynix launches proprietary microLEDs by 2027, shrinking market.

What makes AvicenaTech unique

  • Avicena pioneers microLED optical links replacing lasers with <1 pJ/bit efficiency.
  • LightBundle achieves 1 Tbps/mm density over 10 meters for AI scale-up.
  • TSMC fabricates photo-detectors; GaN microLEDs enable no temperature stabilization.

Help us improve and share your feedback! Did you find this helpful?

Benefits

Wellness Program

Mental Health Support

Flexible Work Hours

Remote Work Options

Paid Vacation

Paid Sick Leave

Paid Holidays

Hybrid Work Options

Growth & Insights and Company News

Headcount

6 month growth

0%

1 year growth

3%

2 year growth

-2%
LEDinside
Mar 27th, 2026
[Insight] OFC 2026 - connecting the world.

[Insight] OFC 2026 - connecting the world. The Optical Fiber Communication Conference and Exposition (OFC) was hosted at the Los Angeles Convention Center from March 17-19, 2026. As the world's largest annual event in optical communications, the OFC not only celebrated its 50th anniversary in 2025 but also attracted interest at OFC 2026 due to the rise of generative AI technology. This year, over 706 industry leaders from 91 countries worldwide convened, along with 115 guest speakers and more than 17,800 attendees. Together, they addressed key global issues, including quantum networking, artificial intelligence (AI), space optics, and data center connectivity, to offer solutions. Topic One: Micro LED CPO ams OSRAM has accumulated nearly 15 years of experience in Micro LED technology through its Micro LED headlight module, EVIYOS. In addition, the company has been actively developing Micro LED solutions for optical communications together with end customers for more than three years. Building on this foundation, ams OSRAM is preparing for the introduction of its own Micro LED-based optical datacom products, targeting a market launch in 2027. These solutions are expected to combine Micro LED emitters, optics, and dedicated ASICs. Microsoft MOSAIC proposed a Micro LED CPO architecture, with MediaTek providing the AOC integration solution. Avicena showcased its LightBundle eKit demo at OFC, achieving a low bit error rate (BER) of <=10[−]9 and a transmission distance of 5 meters at 512 Gbps. Avicena indicated that its 512 Gbps Micro LED optical interconnect is ready for market, and its 896 Gbps solution will be launched in 2Q26. bEMC In response to the optical communication market, bEMC offers 4-inch semi-polar COW and 6-inch semi-polar COC. The company can also provide Micro LED CPO solutions (including coupling) through supply chain integration. Topic Two: Infrared Optical Communications Lumentum has actively ramped up its capacity for 100 / 200 Gbps EMLs and 70 / 100mW CW LDs, while launching new high-bandwidth EML products delivering 400 Gbps/Lane to meet the market demand for 3.2 Tbps connectivity. Meanwhile, the company successfully launched 400mW CW LDs in 2025, followed by the introduction of 800mW CW LDs at OFC. The latter offer >800mW optical power at 50°C, with <100 kHz linewidth and >40 dB side mode suppression ratio (SMSR), significantly improving signal quality in optical communications. In addition, the company has showcased 1,060nm VCSEL optical interconnection solutions. Coherent is ramping 6-inch InP wafer manufacturing to support high-volume production, while developing 400mW CW laser for silicon photonics based pluggable transceivers and co-packaged optics. To meet the emerging market demand for 3.2Tbps connectivity, the company demonstrated two solutions: one for 420Gbps/Lane EMLs and the other for 420Gbps silicon photonics PICs. Moreover, it partnered with three DSP industry leaders, Broadcom, NVIDIA, and Marvell, to develop 1.6Tbps FRO/TRO transceivers. LPO transceivers, in particular, remove the need for DSPs. Despite a higher bit error rate and a limited range of applications, the LPO approach can significantly reduce power consumption and address thermal issues, making it a particularly attractive solution alongside SiPh CPO designs. WIN Semiconductors is the world's largest 150mm GaAs foundry. Standing out from other GaAs suppliers, the company offers turnkey solutions including epi-wafer, chip fabrication, AOI inspection, and coating. WIN Semiconductors has developed Ridge Waveguide (RWG) and Buried Heterostructure (BH) technologies for CW LDs. Compared with RWG, BH delivers higher current density and output power. Comparatively, backside-emitting VCSELs feature flip-chips and etching directly into GaAs substrates, along with the combination of micro bumps and micro lenses to minimize parasitic effects. This approach effectively improves product characterization and enables a smaller package design, making it suitable for 100 Gbps or 100 m optical communications and 3D sensing solutions for automotive or consumer electronics. Dexerials acquired Kyoto Semiconductor and successfully launched 200 Gbps InGaAs photodiodes. These photodiodes feature a low dark current of only 10nA at 2V, a bandwidth of 50 GHz, and a responsivity of 0.7 A/W. Mitsubishi Electric has successfully launched a 100 Gbps uncooled EML and a 200 Gbps cooled EML. 200 Gbps uncooled EML is to be released in the next phase, aiming for short-range transmission around 100 meters. AOI With a portfolio spanning EMLs / CW LDs, photodiodes, and transceivers, the company recently secured a purchase order worth over USD 200 million for 1.6 Tbps transceivers. At the OFC, AOI demonstrated the high stability of its 800 Gbps / 1.6 Tbps transceivers and the testing results obtained from its 6.4 Tbps OBO optical engines. These devices are made with AOI's 400mW LDs and paired with SiPh PICs, achieving highly efficient optical communications using a 32 x 200 Gbps/Lane signaling technology. Optoway Specializing in EML / CW LD chips, package, and transceivers, offers 100 / 200 Gbps EMLs and 70 / 100mW CW LDs, alongside transceiver customization services. LuxNet is dedicated to EML / CW LD chips, package, and transceiver foundry services, and has developed a similar portfolio featuring 100 / 200 Gbps EMLs and 70 / 100mW CW LDs. NTT Innovative Devices showcased its 102.4 Tbps SiPh CPO, which integrates a Broadcom third-generation Ethernet switch, Tomahawk 6, and is compatible with ELSFPs from four suppliers, including CPT, Furukawa, FIT, and O-NET, achieving 102.4 Tbps with 16 units of 16.4 Tbps optical engines. Cisco showcased its 51.2 Tbps SiPh CPO, equipped with 64 units of 800 Gbps FR8 optical engines, a complete liquid cooling solution, and a monitoring system. Its product lifespan meets the requirements of cloud service providers. OFC 2026 Takeaways * Wide and Slow: Driven by the surge of generative AI, demand for high-speed optical communications is accelerating. Micro LEDs boast low power consumption of 1-2 pJ/bit, bandwidth density up to 20 Tbps/mm[2], and a low bit error rate (BER) of <=10[−15], making them well-positioned as a promising alternative to copper interconnects and the go-to solution for short-range, high-speed intra-rack connectivity in scale-up data center networking. In parallel, suppliers including Lumentum and Coherent are launching VCSEL NPO solutions to meet the short-reach transmission demand. * Investment and R&D: To meet the bandwidth requirements beyond 1.6 Tbps, EML and CW LD players are aggressively expanding capacity. In addition, Dexerials is scaling its photodiode production footprint to enhance product performance in terms of sensitivity and response time. * Short Term and Long Term: To address the escalating energy and thermal bottlenecks in data centers, linear pluggable optics (LPO) and SiPh CPO technology have emerged as new market spotlights. TrendForce 2026 Infrared Sensing Application Market and Branding Strategies Release: 01 January 2026 Format: PDF / EXCEL Language: Traditional Chinese / English Page: 168 TrendForce 2025 Micro LED Display and Non-Display Application Market Analysis Release: 29 May / 30 November 2025 Languages: Traditional Chinese / English Format: PDF Page: 119 | If you would like to know more details, please contact: | Global Contact: | / | ShenZhen: | | Grace Li E-mail: [email protected] Tel: +886-2-8978-6488 ext.916 | / | Perry Wang E-mail: [email protected] Tel: +86-755-82838931 ext.6800 Disclaimers of Warranties 1. The website does not warrant the following: 1.1 The services from the website meets your requirement; 1.2 The accuracy, completeness, or timeliness of the service; 1.3 The accuracy, reliability of conclusions drawn from using the service; 1.4 The accuracy, completeness, or timeliness, or security of any information that you download from the website 2. The services provided by the website is intended for your reference only. The website shall be not be responsible for investment decisions, damages, or other losses resulting from use of the website or the information contained therein< Proprietary Rights You may not reproduce, modify, create derivative works from, display, perform, publish, distribute, disseminate, broadcast or circulate to any third party, any materials contained on the services without the express prior written consent of the website or its legal owner. Related Entries

Business Wire
Mar 12th, 2026
Avicena launches world's first microLED optical interconnect evaluation kit for AI infrastructure

Avicena has launched the LightBundle eKit, the industry's first evaluation platform for microLED optical connectivity in AI infrastructure. The kit enables hyperscalers and AI system architects to test next-generation optical links designed to overcome bandwidth, reach and energy limitations of copper interconnects. The platform integrates 320 microLED data channels supporting up to 896 Gbps throughput with 5-metre and 10-metre optical fibre connectivity. It achieves raw bit error rates better than 10⁻¹² at 512 Gbps without forward error correction. MicroLED technology eliminates lasers entirely, enabling reliable low-energy operation at elevated temperatures whilst delivering terabit-per-millimetre bandwidth density. The LightBundle eKit will be available to select partners in March 2026, with broader availability planned for Q2 2026. Avicena is demonstrating the technology at OFC 2026 in booth 324.

SPIE
Nov 19th, 2025
CEA Leti, Avicena, and Microsoft target AI interconnects with microLEDs

CEA Leti, Avicena, and Microsoft target AI interconnects with microLEDs. Lab-to-fab initiative launched at Semicon Europa as Avicena introduces new ultra-low-power 'LightBundle' links. Typically touted for their suitability in next-generation displays and mixed reality hardware, microLEDs now look set to make an impact in a completely different application area - AI infrastructure. During this week's Semicon Europa event in Munich, Germany, the giant French research lab CEA Leti launched a three-year initiative to develop microLEDs for ultrafast data transfer, while US startup Avicena has launched a new ultra-low-power microLED interconnect at the SuperCompute 2025 show in St Louis. On top of that, a team at Microsoft has developed prototype microLED links that are said to break the typical trade-off between speed, cost, energy consumption, and reliability. Lab-to-fab CEA Leti says that its "lab-to-fab" effort, slated to kick off in January, draws on the research institute's deep expertise in microLED process technology. Open to all parties in the microelectronics supply chain - and looking to engage makers of microLEDs, optical fibers, photodiodes, and interconnects, as well as chipmakers, system integrators, and hyperscalers - the project is said to be aiming for "orders-of-magnitude" data transfer gains. Lab CEO Sébastien Dauvé explained the thinking thus: "Over the past decade, the computing power required to train leading-edge AI models has exploded by factors of millions, doubling roughly every three to four months as systems become more complex and data-hungry. "Supercomputers demand ever-faster communication links with very high energy efficiency and ultra-low latency - but interconnect performance is lagging behind compute power. That gap calls for a paradigm shift capable of boosting high-performance computing speed by orders of magnitude." At the moment AI infrastructure relies on a combination of legacy copper interconnects and laser-based solutions, with the latter able to provide speedy connectivity but at the expense of cost and power consumption - partly because of the threshold current that must be exceeded before a laser emits light. Microsoft's MOSAIC prototype On the other hand microLEDs can emit light even at extremely low currents - with CEA Leti suggesting that they offer a compelling alternative, consuming less energy than either copper- or laser-based systems. That advantage has also been noted by Microsoft, whose recent "MOSAIC" project results suggest that microLEDs can break the fundamental trade-off between reach, power, and reliability. According to a Microsoft research paper presented at September's SIGCOMM event in Portugal, the prototype MOSAIC technology - which also uses printed micro-optics - is able to deliver ten times the reach of copper, while reducing power consumption by up to two-thirds, and much-improved reliability compared with today's laser-based optical links. "MicroLED represents a true paradigm shift for short-range optical, point-to-point data interconnects," Dauvé added. "It delivers extremely high data-density transfer rates with far better energy efficiency than current technologies. "Unlike silicon photonics or VCSEL [links], microLED is scalable for massive parallel communication. By combining the complementary expertise of our program members, we aim to break through the interconnect power and density bottlenecks that limit next-generation computing." Femtojoule energy consumption Avicena is looking to make a more immediate impact with its new "LightBundle" microLED links, which are said to offer 4 Gb/s lane speed alongside transmitter currents as low as 100 μA per LED. "While silicon photonics can achieve low effective power by splitting a single external laser across many resonant modulators, microLEDs inherently generate their own light, dramatically simplifying packaging," points out the US firm. "Avicena microLED transmitters are only a few microns in size, require no temperature stabilization, and avoid complex control loops. These microscopic emitters can be arrayed at extremely high density to deliver terabits of aggregate bandwidth." The LightBundle chiplet transceivers are described as well-suited to various packaging architectures - including co-packaged optics (CPO), on-board optics (OBO), pluggable optical modules, and wide memory interconnects. Avicena's chief scientist Rob Kalman said: "We already demonstrated an efficient microLED link in a live demo at ECOC 2025 in September. "By further optimizing our highly sensitive receivers, we have managed to further reduce the operating currents of the microLEDs and obtained [transmitter] energy consumption down further to tens of femtojoules for this part of the link. "Combined with the unique properties of microLEDs, we can achieve unmatched energy efficiency in our LightBundle interconnects. This benchmark shows the scalability of our roadmap, how microLED technology can replace legacy laser-based links with a simpler, more reliable and far lower power solution."

Business Wire
May 15th, 2025
Avicena Announces Series B Funding Round Led by Tiger Global with Participation from SK hynix

Avicena, the leader in ultra-low power high-density microLED-based interconnects, announced today it has raised $65M in Series B Funding, bringing the total ...

VC News Daily
May 14th, 2025
Avicena Secures $65M in Series B Funding

Avicena, based in Sunnyvale, CA, has secured $65 million in a Series B funding round. The company specializes in ultra-low power high-density microLED-based interconnects.