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Cisco

Cisco

Networking hardware, security software, collaboration services

ASIC Physical Design Engineer

Full-Time
No salary listed
Senior, Expert
Bachelor's, Master's
Pune, Maharashtra, India
In Person

About the job

Requirements
  • A Bachelor’s or Master’s degree in Electrical Engineering or an equivalent field is required.
  • Three or more years of physical design experience in ASIC or system-on-chip physical design and implementation using advanced CMOS technology nodes is required.
  • Eight to twelve years of physical design experience in ASIC or system-on-chip physical design and implementation is listed in the qualifications.
  • Hands-on experience with the full physical design flow, including floor planning, power planning, place and route, clock tree synthesis, extraction, static timing analysis, engineering change orders, and physical signoff, is required.
  • Experience with synthesis tools such as Cadence Genus or equivalent, place-and-route tools such as Cadence Innovus, static timing analysis tools such as Cadence Tempus or Synopsys PrimeTime, back-end reliability and power integrity tools such as Cadence Voltus or Ansys RedHawk, and physical verification tools such as Siemens Calibre or Cadence Pegasus is required.
  • Strong scripting skills in Tcl, Python, or Perl for automation and flow development are required.
  • Familiarity with ASIC and system-on-chip design flows, design-for-test concepts, and Linux-based development environments is required.
  • Candidates must be able to collaborate effectively with cross-functional engineering teams.
  • A good understanding of electronic design automation tools and signoff criteria is required.
Responsibilities
  • Perform RTL or netlist-to-GDSII implementation for block-level and full-chip designs in advanced technology nodes.
  • Support digital implementation flows and collaborate with electronic design automation tool vendors to debug issues.
  • Develop hierarchical floor plans, macro placement, input/output planning, congestion analysis, timing analysis, and power distribution.
  • Perform static timing analysis, analyze timing reports, and implement timing engineering change orders using Tempus and Tempus ECO or equivalent industry-standard tools.
  • Collaborate with RTL, analog, design-for-test, packaging, computer-aided design, and electronic design automation teams to resolve implementation issues and improve design convergence.
  • Run and debug back-end signoff checks, including power integrity, electromigration analysis, and physical verification.
  • Develop automation scripts using Tcl, Python, Bash, or Perl for quality-of-results tracking, reporting, and flow efficiency.
  • Help define implementation strategy, physical constraints, and floor-planning methodology.
  • Own block-level implementation and contribute to full-chip integration of various intellectual properties.
  • Work with cross-functional teams to achieve timing, power, area, congestion, and signoff closure and support successful silicon delivery.
Desired Qualifications
  • A Master’s degree is preferred.

About the company

Cisco designs and sells networking hardware, software, and services that help organizations connect, protect, and manage data. Its products include networking gear, security solutions, cloud services, and collaboration tools like Webex to support hybrid work. Cisco differentiates itself with a broad, integrated stack—routing and switching, security, cloud, and collaboration—that works together at scale. Its goal is to help customers securely connect people, devices, and applications, enabling reliable communication and digital transformation across enterprises of all sizes.

Company Size

10,001+

Company Stage

IPO

Headquarters

San Jose, California

Founded

1984

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Simplify's Take

What believers are saying

  • Cisco booked $9.3 billion hyperscaler AI orders in fiscal 2026, up 4.5 times.
  • August 12, 2026 guidance targets $72.2 billion to $73.4 billion revenue for fiscal 2027.
  • Cisco AI POD for Splunk and the Saudi HUMAIN partnership expand monetizable AI infrastructure.

What critics are saying

  • Fiscal 2026 gross margin fell to 66.3%; hardware-heavy AI orders will compress 2027 margins.
  • May 2026 layoffs of nearly 4,000 employees signal deeper restructuring and weak legacy growth.
  • Arista and hyperscaler in-house networking can bypass Cisco, crippling AI revenue conversion by 2028.

What makes Cisco unique

  • Cisco owns the enterprise network, plus Splunk telemetry, security, and collaboration in one stack.
  • Cisco Silicon One and Cloud Control unify routing, observability, and agentic AI operations.
  • Cisco's channel breadth and installed base keep campus refresh cycles sticky through 2027.

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Benefits

Paid Vacation

Hybrid Work Options

Flexible Work Hours

Professional Development Budget

Growth & Insights and Company News

Headcount

6 month growth

0%

1 year growth

0%

2 year growth

0%
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