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Rambus

Licenses high-speed chip-to-chip connectivity IP

SMTS Foundry Technology

Process EngineeringPosted on Nov 5
Full-timeTaipei City, Taiwan

About the Job

Requirements

  • A Bachelor of Science or Master of Science in Electrical Engineering, or equivalent experience.
  • Strong experience in semiconductor process technology, such as BCD or FinFET.
  • Hands-on experience with yield analysis and foundry interaction.
  • Experience with TSMC technology and systems.
  • Fluency in English and Mandarin.
  • Strong cross-functional communication and collaboration skills.

Responsibilities

  • Drive yield improvement initiatives with foundries through data analysis of WAT and test data, and root-cause investigation.
  • Collaborate with foundries to implement process improvements and continuous improvement program actions.
  • Execute foundry tapeouts, including GDS release, MT form preparation, and engineering lot planning.
  • Support technology evaluation for new nodes and/or new foundries.
  • Work with the supply chain team on wafer work-in-progress management.
  • Support design teams with PDK usage, design rules (DRC/LVS), and interpretation of process guidelines.
  • Act as the primary technical interface between internal engineering teams and external foundry partners, ensuring technology qualification, tapeout execution, yield ramp, and high-volume production readiness.

Desired Qualifications

  • Familiarity with PDK, DRC/LVS, and IC design flow.

About the Company

Rambus

Licenses high-speed chip-to-chip connectivity IP

Rambus designs, develops, and licenses high-speed chip-to-chip connectivity technology. Its IP powers data center servers, AI accelerators, and automotive systems, and is licensed to other semiconductor companies rather than manufactured and sold directly. The products are high-speed interfaces and security features embedded in chips, enabling fast, reliable communication between components. Rambus differentiates itself through a licensing-based model focused on advanced IP for memory, security, and high-speed interfaces across data centers, AI, and automotive markets, rather than relying on a traditional product lineup. The company’s goal is to enable high-performance chip communication at scale by monetizing its intellectual property through licensing and expanding into growing markets like data centers, AI, and automotive.

Company size
1,001-5,000
Company stage
IPO
Headquarters
San Jose, CA
Founded
1990

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