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Synopsys

EDA software for chip design

ASIC Digital Design - Firmware Manager

Engineering LeadershipConfirmed live in the last 24 hours
Full-timeOttawa, ON, CanadaNo salary listedIn-person

About the Job

Requirements

  • A BSc, MS, or PhD in Computer Science, Electronics Engineering, or a related field.
  • Proven experience as a Tech Lead or Engineering Manager leading embedded firmware or silicon IP development teams.
  • Strong proficiency in C for embedded firmware applications, including writing and debugging production-level code in resource-constrained environments.
  • Hands-on experience with RTL waveform analysis and debugging, including tracing issues across the firmware and hardware boundary.
  • Demonstrated ability to mentor and grow engineers, with specific examples of helping team members develop technically.
  • Ability to discuss technical tradeoffs with engineers, explain project status to stakeholders, and work through requirements with customers.
  • Experience working in hardware and software development contexts, understanding how firmware interacts with RTL and physical interfaces.

Responsibilities

  • Lead a team of 5 to 8 firmware engineers building training algorithms and control logic for next-generation DDR, LPDDR, and HBM memory interface PHYs.
  • Manage the full project lifecycle for complex PHY firmware deliverables, from architecture discussions through customer deployment and support.
  • Spend up to 20% of time working directly with global customers to clarify requirements and resolve technical issues.
  • Coach and develop engineers across experience levels, providing technical guidance on embedded C development, RTL integration, and debugging strategies.
  • Drive engineering standards for code quality, documentation, and testing practices across the team.
  • Debug and resolve issues spanning firmware, RTL, and hardware interfaces using waveform analysis and cross-domain troubleshooting.
  • Represent the team in technical reviews and stakeholder meetings, translating complex engineering tradeoffs into clear recommendations.
  • Enable the team to deliver memory interface solutions that meet customer performance and quality targets.
  • Accelerate customer development cycles by ensuring robust, well-documented firmware that integrates with customer verification and bring-up workflows.
  • Raise the technical capability of the group by mentoring junior engineers and establishing pathways for skill development.
  • Shorten project timelines by catching integration issues early and maintaining alignment between firmware, RTL, and customer requirements.
  • Strengthen technical excellence in silicon IP by delivering solutions that work reliably and scale across product generations.
  • Build a team culture where engineers are supported, challenged, and equipped to work on difficult problems.
  • Influence the technical direction of future memory interface products by providing feedback from the firmware development perspective.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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