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FuriosaAI

Power-efficient AI inference accelerator chips

Hardware Silicon Validation Team Lead - NPU SoC

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeSeoul, South KoreaNo salary listedIn-person

About the Job

Requirements

  • Experience in SoC, ASIC, or complex silicon/system validation; leadership experience in the field or equivalent senior-level experience is required for a leader-level candidate.
  • Strong knowledge of ARM architecture, AMBA buses such as AXI and AHB, and SoC/computer architecture.
  • Embedded C/C++ and Rust programming skills for hardware control and IP testing, including bare-metal development experience.
  • Understanding and experience with validation methodology, including test planning, bug tracking, and coverage.
  • Ability to use JTAG debuggers such as Trace32 and perform hardware/software co-debugging.
  • Ability to logically analyze and persistently investigate complex system issues to resolution.

Responsibilities

  • Lead NPU first-silicon bring-up, initial operation and scenario-based functional validation of NPU accelerator cores, CPU subsystems, NoC blocks, memory subsystems such as LPDDR/HBM, and high-speed interfaces such as Ethernet; perform board bring-up and system initialization, including boot sequence and clock/reset configuration.
  • Establish and execute systematic validation methodology, including test planning and coverage management across pre-silicon emulator/FPGA and post-silicon environments; write bare-metal test firmware and develop scenarios for IP validation.
  • Analyze complex issues at the hardware RTL and software firmware/driver boundary using tools such as JTAG and Trace32, derive workarounds, and report findings to relevant teams.
  • Support validation of NPU data-processing pipeline and memory-bandwidth performance optimization.
  • Write test-automation scripts and build validation environments integrated with CI/CD.
  • Plan bring-up and validation roadmaps across NPU generations and manage schedules.
  • Coordinate collaboration and lead technical decision-making with design, DV, firmware, software, QA, and related teams.
  • Lead team members' technical development and establish systematic validation processes and methodology.

Desired Qualifications

  • Experience validating and bringing up AI accelerators such as NPU/TPU, GPUs, or complex multicore SoCs.
  • Pre-silicon validation experience with environments such as Palladium, Zebu, or FPGA.
  • Strong understanding of protocols and controller operation for high-speed interfaces such as Ethernet, CXL, LPDDR, and HBM.
  • Understanding of Linux kernel and device-driver operation.
  • Experience actively using Rust in system-level software development.
  • Experience building validation automation environments using scripting languages such as Python, Tcl, and Bash.

About the Company

FuriosaAI

Power-efficient AI inference accelerator chips

FuriosaAI develops AI accelerators for data centers. Its flagship RNGD chip is a power-efficient accelerator designed to boost performance per watt for running large language models and other demanding AI workloads. The hardware is configurable with multiple processing elements to fit different workloads, and it is paired with advanced compiler technology and profiling tools to identify bottlenecks and optimize efficiency. This combination of flexible hardware and software optimization differentiates FuriosaAI from competitors, focusing on maximizing performance while keeping energy use low. The company targets data centers and enterprises that need high-performance, energy-efficient AI solutions, and aims to make AI computing more sustainable and scalable by selling its chips and related software tools and pursuing long-term contracts with large-scale customers.

Company size
201-500
Company stage
Series D
Total funding
$887.5M
Headquarters
Seoul, South Korea
Founded
2017

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