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Synopsys

EDA software for chip design

Senior Application Engineer - Verification Tools

Implementation & Technical Account ManagementConfirmed live in the last 24 hours
Full-timeHo Chi Minh City, VietnamNo salary listedIn-person

About the Job

Requirements

  • At least 1 year of experience in Design and Verification or as an Application Engineer in the Verification field.
  • Good knowledge of Verilog, UVM, SystemVerilog, and VHDL; UPF is a plus.
  • Expertise in Design and Verification, Verification IPs (AMBA VIP), and static and/or dynamic verification.
  • Excellent English communication skills and ability to work cross-functionally and cross-regionally.
  • Passion for using new tools and features, including AI-related tools.
  • Ability to manage relationships with customers and internal stakeholders.
  • Demonstrated leadership in mentoring, onboarding, or leading technical initiatives.

Responsibilities

  • Provide advanced technical support for EDA Design and Verification tools, including VCS, Verdi, SpyGlass, Certitude, and Z01X, resolving complex customer issues and ensuring customer satisfaction.
  • Own tool migrations and bring up verification environments and Verification IPs.
  • Collaborate with worldwide Application Engineers, R&D teams, and customers to understand requirements, address escalations, and support successful adoption of solutions and tool development.
  • Contribute to strategies to secure and expand market share by understanding the competitive landscape and building strong customer relationships.
  • Develop and share technical documentation, lead knowledge transfer, and mentor junior team members.

Desired Qualifications

  • UPF knowledge.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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