Senior Layout Engineer - DPG Layout

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Description

For more than 40 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life.  We are searching for a Senior layout engineer in Micron Technology’s DRAM Engineering Group in India. As a Senior Layout engineer, you will work with an exceptionally talented, passionate core team based in India collaborating with peer teams crossing Micron global footprint, to meet scheduled milestones in a multiple projects-based environment.

Role and Responsibilities

• Having in-depth understanding of all aspects of layout and responsible for design and development of full chip layout, drive it in terms of technical decisions spanning across all areas like analog, digital, memory, ESD, full chip EM/IR etc.
• Drive layout guidelines (technical, quality etc.) for successful execution of fullchip layouts.
• Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
• Responsible for on-time delivery of fullchip and block-level layouts with acceptable quality.
• Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.
• Collaborate with Design, Verification, CAD, DTCO, PI, and cross-functional teams to define and execute layout solutions.
• Establish methodologies, layout standards, and best practices for assigned areas.
• Contribute to layout methodologies, automation, scripting, and productivity improvements.
• Share domain knowledge across the layout organization.
• Drive innovation in layout teams and demonstrate technical depth through paper publications, seminars and disclosures.
• Guide junior team-members in their execution of Sub block-level layouts & review their work
• Contribute to effective project-management.
• Hire, build and manage high performing teams to meet global layout standards in DPG layout organization.
• Effectively communicating with engineering teams in the US, Japan, and Germany to assure the success of the layout project.
• Ability to write clear, technical prompts for design/verification use cases (provide spec context, interfaces, corner conditions, assumptions, and expected output format) to help produce items required for Design and Verification using AI tools.
• Strong judgment to validate AI outputs before use (review assumptions, align with specs/standards, cross-check with simulations, waveforms, assertions, and coverage reports, and document what was accepted/changed) prior to incorporating results into design decisions, verification plans, or debug conclusions.

Qualification/Requirements

• 15 + year experience in analog/custom layout design in advanced CMOS process.
• Expertise in Cadence VLE/VXL and Calibre DRC/LVS is a must.
• Should have hands on experience of Critical Analog Layout design of blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
• Should have hands on experience in handling various memories like DRAM, SRAM, CAM, OTP etc
• Good understanding of Analog Layout fundamentals (e.g. Matching, Electro-migration, Latch-up, coupling, cross-talk, IR-drop, active and passive parasitic devices etc.)
• Understanding layout effects on the circuit such as speed, capacitance, power and area etc.
• Ability to understand design constraints and implement high-quality layouts.
• Excellent command and problem-solving skills in over Physical layout verification.
• Should have experience in leading multiple project and Tape-out.
• Experience in scripting and automation.
• Excellent verbal and written communication skills.

• Education - BE or MTech in Electronic/VLSI Engineering.

About Micron Technology, Inc.

We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich lifefor all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.

To learn more, please visit micron.com/careers

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.

To request assistance with the application process and/or for reasonable accommodations,please contact [email protected]

Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.   

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