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Synopsys

EDA software for chip design

Analog Design Senior Staff Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeIn-person

About the Job

Requirements

  • An M.A.Sc. with at least 8 years or a PhD with at least 6 years of relevant analog circuit design experience.
  • Experience with operational amplifiers, current mirrors, and bandgaps.
  • Proficiency using computer-aided design (CAD) tools for analog circuit design and simulation.
  • Knowledge of design for reliability, including electromigration, IR drop, and aging.
  • Knowledge of layout effects, including matching, reliability, and proximity effects, and experience with layout design.
  • Experience with FinFET and Gate-All-Around technologies.
  • Strong problem-solving skills and the ability to troubleshoot complex issues.
  • Strong written and verbal communication skills, including the ability to clearly convey technical concepts.

Responsibilities

  • Design and develop common analog building blocks for SERDES, DDR, and memory.
  • Conduct simulations and verify analog circuit performance against design specifications.
  • Identify and refine circuit designs to achieve power, area, and performance targets.
  • Collaborate with product design and layout teams to ensure designs meet customer needs.
  • Perform design reviews and provide technical guidance to junior engineers.
  • Contribute to design methodologies and best practices to improve efficiency and quality.
  • Enhance the performance and reliability of analog IP products to meet industry standards.
  • Drive innovation in analog circuit design and contribute to developing new technology.
  • Enable integration of analog components into complex system-on-chip designs.
  • Provide technical leadership and mentorship to junior engineers.
  • Collaborate with cross-functional teams to deliver products on time and within budget.

Desired Qualifications

  • Familiarity with SERDES PHY architecture and/or DDR memory.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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