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AMD

Designs chips for computers and AI systems

Senior Silicon Design Engineer: Hardware-Software Co-Design

Systems Software EngineeringConfirmed live in the last 24 hours
Full-timeSan Jose, CA, USANo salary listedIn-person

About the Job

Requirements

  • Demonstrated communication and presentation skills through technical publications, presentations, trainings, or executive briefings.
  • Industry experience at the boundary of GPU compute hardware and AI systems software.
  • A strong computer architecture foundation, including memory consistency and coherence models, GPU microarchitecture, and pipelining.
  • Demonstrated performance modeling skills and the ability to build analytical or simulation-based models that predict hardware behavior and inform engineering decisions.
  • Proficiency in C and C++ in system-level contexts, and Python for tooling, analysis, and framework-level work.
  • Experience with GPU programming using CUDA and/or HIP, including writing and optimizing compute kernels beyond library calls.
  • Familiarity with Linux kernel internals relevant to GPU compute, including the DRM/GEM subsystem, kernel-mode driver interfaces, memory management, and userspace-kernel interaction patterns.
  • Experience with compute runtimes and the full dispatch path from framework-level operations to GPU execution.
  • Experience with AI framework internals, including the PyTorch dispatcher, Triton compiler, or equivalent depth in how frameworks lower operations to hardware.
  • Direct experience with AMD Instinct GPU architectures and the ROCm stack.
  • Working knowledge of compiler infrastructure such as LLVM/MLIR-based flows, backend code generation, or related optimization passes.
  • Familiarity with modern AI model architectures, including quantization techniques, KV cache, attention mechanisms and variants, mixture-of-experts routing, or emerging state space models, and understanding of their hardware demands.
  • Experience with GPU performance analysis tools such as profilers, trace viewers, and hardware counters, and building custom tooling on top of them.

Responsibilities

  • Build performance and power models connecting architectural decisions to real workload behavior.
  • Evaluate proposed hardware features and software API designs against AI training and inference targets.
  • Write and optimize GPU kernels and compiler passes that exploit microarchitectural characteristics.
  • Work across the Linux kernel DRM/GEM layer, ROCm runtime, IREE compiler, and AI frameworks and domain-specific languages such as PyTorch and Triton.
  • Use detailed performance models of instruction execution, memory hierarchy behavior, networking, and compute-memory overlap to drive software optimization and hardware design feedback.
  • Analyze and characterize AI training and inference workloads against AMD Instinct microarchitecture to identify performance bottlenecks, inform silicon roadmap decisions, and validate real-world speedups from architectural features.
  • Collaborate with GPU hardware and firmware teams to evaluate proposed features and analyze how memory subsystem, cache coherence protocol, or execution-unit changes affect workloads.
  • Own the feedback loop between workload characterization and hardware design by building methodology, tooling, and benchmarks across Instinct generations.
  • Contribute to the IREE compiler and ROCm stack, focusing on backend optimizations, runtime API extensions, and firmware command packet design for AMD GPU microarchitecture.
  • Design and optimize compute runtime paths, including AI framework dispatch, data movement, and pipelining, to reduce overhead and maximize hardware utilization for latency-sensitive and throughput-critical workloads.
  • Work at the Linux kernel level on GPU compute infrastructure to improve asynchronous execution and reduce latency.
  • Contribute across the open ROCm ecosystem to improve the AMD AI developer experience.
  • Develop reproducible benchmarks and performance regression infrastructure across compiler, runtime, and driver changes.
  • Represent software perspectives in silicon architecture reviews and hardware realities to software and framework teams.
  • Collaborate with architecture teams to provide software feedback on next-generation Instinct GPU designs for training and inference workloads.

Desired Qualifications

  • Publications or patents in high-performance computing, machine learning systems, or GPU kernel optimization.
  • Experience with IREE.

About the Company

AMD

Designs chips for computers and AI systems

AMD designs processors, graphics chips and AI accelerators for computer makers, cloud operators and businesses that build electronic devices. Its Ryzen processors power personal computers, while EPYC processors handle work in data centers and Radeon chips render graphics. Instinct accelerators run AI models, paired with software that developers use to train models and put them into production. AMD sells chips and related computing systems through equipment makers, distributors and retail channels, and contracts with outside foundries to fabricate its semiconductor designs. It was founded in 1969 and has its headquarters in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1969

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