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AMD

Designs chips for computers and AI systems

Lead SoC Architect

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeNo salary listedIn-person

About the Job

Requirements

  • Recognized industry expertise in heterogeneous SoC architecture, with deep experience in CPUs, AI, networking, storage, compute and crypto acceleration, advanced protocols such as PCIe, UCIe, UAL and/or Ethernet, and high-bandwidth memory/interconnect design.
  • Demonstrated leadership experience on complex technical programs, balancing performance, power, area, and cost tradeoffs.
  • Proven track record defining and delivering architecture for complex heterogeneous SoCs in advanced nodes.
  • Expertise in x86, ARM or RISC-V based processor subsystems and heterogeneous acceleration.
  • Deep technical knowledge of PCIe, CXL, Ethernet, DDR, UCIe, and UAL protocol specifications, and how their mandatory and optional protocol features are leveraged in the SoC or system.
  • Strong technical leadership across interconnect fabrics, memory and I/O technology and subsystems.
  • Familiarity with high-speed I/O protocols, multi-chiplet partitioning, and chiplet interconnect standards.
  • Proficiency with architectural modeling and performance simulation frameworks.
  • MS or PhD in Electrical or Computer Engineering, or a related field.

Responsibilities

  • Own and lead the architecture of next-generation SoCs, spanning high-performance multiprocessor subsystems, coherent and non-coherent interconnects, memory and cache hierarchies, advanced I/O, and AI, networking, storage, compute, and crypto acceleration.
  • Define long-term SoC architectural strategy aligned with product, roadmap, and customer requirements.
  • Develop detailed SoC architecture specifications covering compute, memory, accelerators, on-chip and off-chip interconnect, RAS, security, boot/configuration, and SoC management subsystems.
  • Guide cross-functional execution across RTL design, verification, physical design, firmware, software, and platform teams.
  • Collaborate with AI, data center, security, communications, and embedded computing customers, translating RFQs and use cases into SoC architectural requirements.
  • Evaluate emerging processor IP, including next-generation x86, ARM, and RISC-V cores, compute accelerators, and next-generation PCIe, CXL, Ethernet, DDR, UCIe, and/or UAL protocols.
  • Lead PPA trade-off decisions, ensuring architectural choices align with product cost, performance, power targets, and manufacturability constraints.
  • Innovate cross-domain technologies such as hardware security, heterogeneous coherency, traffic shaping, system QoS, and power management.
  • Mentor architects across the organization, elevating architectural rigor, methodology, and technical leadership capability.
  • Create flexible and modular subsystem architectures deployable in chiplet, monolithic, or 3D form factors.
  • Author clear and concise architecture specifications and guide and assist pre-silicon design/verification and post-silicon validation during execution.

Desired Qualifications

  • Demonstrated ability to influence silicon strategy, ecosystem partners, and customer roadmaps.
  • Patents, publications, or major architectural wins are strongly preferred.

About the Company

AMD

Designs chips for computers and AI systems

AMD designs processors, graphics chips and AI accelerators for computer makers, cloud operators and businesses that build electronic devices. Its Ryzen processors power personal computers, while EPYC processors handle work in data centers and Radeon chips render graphics. Instinct accelerators run AI models, paired with software that developers use to train models and put them into production. AMD sells chips and related computing systems through equipment makers, distributors and retail channels, and contracts with outside foundries to fabricate its semiconductor designs. It was founded in 1969 and has its headquarters in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1969

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