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SiTime

Fabless MEMS timing solutions provider

Senior Sustaining Test Engineer - Test Engineering

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeRemote in SingaporeNo salary listed

About the Job

Requirements

  • A bachelor's or master's degree or above in Engineering, Computer, Electrical, Industrial, or a related field.
  • Hands-on experience with a prober and automated test equipment (ATE).
  • Experience with Final Test and/or Wafer Sort/Circuit Probing.
  • Hands-on experience sustaining production lines for Final Test or Circuit Probe/Wafer Sort as a Product Test Engineer or Test Engineer.
  • Hands-on experience with ETS-88, ETS-364, or other commercial testers such as LTX, Advantest, uFlex, or iFlex.
  • Familiarity with or knowledge of C++ or Python programming languages.
  • Experience setting up and verifying testing hardware, such as probe cards, load boards, and circuit interface boards.
  • A background in test methodologies, test flows, and schematics.
  • English communication proficiency.
  • Open to local candidates and foreigners with permanent residency status.

Responsibilities

  • Provide solutions and dispositions for test abnormalities in manufacturing and production environments.
  • Plan and execute qualification and buy-off for new and mature products, test hardware and tooling, ATE systems, test programs, and other testing-related coverage.
  • Perform test data analysis and provide documented reports on buy-off and qualification.
  • Provide remote and online debugging for test hardware and tooling, products, test programs, and system issues.
  • Gain product-transfer knowledge about testing and test processes from cross-functional teams.
  • Provide continuous line support for production-released SiTime products by addressing testing-factor abnormalities, project improvements, and testing deployment activities for new products.
  • Support NPI-to-mass-production release testing activities.
  • Ensure OSAT testing for Final Test and Circuit/Wafer Probing avoids issues that could cause line shutdowns or output delays.
  • Interface with internal cross-functional teams and OSAT personnel.
  • Develop and refine test processes for Circuit/Wafer Probing and Final Test.
  • Implement test-process improvements where necessary.
  • Create and maintain test-process documentation, including SOPs, control plans, and troubleshooting guides.
  • Travel locally or internationally as needed to support work-related activities.
  • Analyze test data and provide testing-related dispositions for manufacturing and production abnormalities in Final Test and Circuit/Wafer Probing.
  • Drive qualification and buy-off for test hardware and tooling, products, test programs, and systems deployed for mass production.
  • Take initiatives on test improvements and test-program revisions and releases.
  • Perform test-engineering experiments and studies on test hardware and tooling, products, ATE, and test programs.
  • Implement test processes to ensure testing SOPs are followed.
  • Document test-process SOPs and revise current practices when improvements are needed.
  • Provide OSAT with expertise on SiTime products, test hardware, and test programs.

Desired Qualifications

  • Five to fifteen or more years of industry-related work experience is preferred.
  • Familiarity with SPC, FMEA, and Lean Six Sigma methodologies is a plus.

About the Company

SiTime

Fabless MEMS timing solutions provider

SiTime designs MEMS-based timing solutions (oscillators, network synchronizers, and jitter cleaners) as a fabless semiconductor company. MEMS resonators on silicon replace quartz to generate precise clocks and synchronize networks, with manufacturing handled by third-party foundries. The approach offers smaller size, lower power consumption, and better temperature stability, supported by scalable, design-focused development rather than in-house fabrication. Its goal is to expand MEMS timing adoption across automotive, industrial, IoT, mobile, aerospace, and telecom markets worldwide.

Company size
501-1,000
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
2005

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