FPGA Post Silicon Validation Engineer - HPS USB

Join our Silicon Validation team and play a critical role in enabling robust HPS USB subsystems for next-generation FPGA SoC devices. You will lead device-level and system-level validation of USB host/device functionality, HPS boot flows, connectivity, and peripheral integration to ensure high reliability, interoperability, performance, and customer readiness.

This role provides hands-on opportunities in SoC bring-up, USB protocol validation, embedded processor systems, FPGA-HPS integration, and advanced silicon debug, working closely with architecture, design, firmware, and platform teams.

Key Responsibilities

• Develop and execute comprehensive post-silicon validation strategies for HPS USB subsystems, covering USB 2.0/3.x Host, Device, OTG, Hub, and peripheral interoperability scenarios.
• Perform system bring-up and debug of HPS subsystems, focusing on USB connectivity, protocol compliance, reset sequencing, clocking, PHY initialization, and hardware-software interactions.
• Create and execute test plans for USB protocol validation, interoperability testing, stress testing, performance benchmarking, negative testing, and corner-case scenarios.
• Debug silicon issues using protocol analyzers, oscilloscopes, logic analyzers, JTAG debuggers, and USB compliance tools.
• Drive root-cause analysis and issue triage across silicon, firmware, software, and platform components.
• Develop automation frameworks and regression environments using Python, TCL, Bash, or similar scripting languages.
• Collaborate with architecture, firmware, design, and board teams to improve USB validation coverage, observability, and debug capabilities for future products.
• Drive innovation in validation methodologies, automation, and infrastructure to improve quality, scalability, and execution efficiency

• Bachelor’s or Master’s degree in Electrical & Electronics Engineering, Computer Engineering, Computer Science, or a related field.
• 8+ years of post-silicon validation experience with emphasis on SoC, HPS, USB, or high-speed I/O subsystems.
• Strong understanding of USB 2.0/3.x architecture, protocol layers, enumeration, link training, power management, and compliance requirements.
• Experience validating embedded processor subsystems, including boot loaders, Linux environments, device drivers, memory bring-up, and peripheral validation.
• Strong hardware and software debug skills with experience troubleshooting complex system-level issues.
• Experience with USB protocol analyzers (LeCroy Voyager, Total Phase, etc.), oscilloscopes, and validation lab equipment.
• Proficiency in Python, TCL, or similar scripting languages for automation and test infrastructure development.
• Familiarity with FPGA SoC architectures and embedded systems is highly desirable