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SiTime

Fabless MEMS timing solutions provider

ASIC Digital Verification Engineer Co-op

Hardware Validation & TestingConfirmed live in the last 24 hours
Internship · Winter 2027Ottawa, ON, Canada

About the Job

Requirements

  • Maintain good academic standing.
  • Have object-oriented coding skills.
  • Have knowledge of Verilog, SystemVerilog, and UVM as assets.
  • Have knowledge of scripting languages such as Python and Tcl as an asset.
  • Have English proficiency, including the ability to communicate, collaborate, and perform job responsibilities in a professional business environment.

Responsibilities

  • Gain exposure to ASIC verification.
  • Contribute to verification efforts for ongoing projects.
  • Work with diverse design and verification team members, both local and remote.

Desired Qualifications

  • Work effectively with minimal supervision.
  • Be a fast learner.
  • Be an effective team player with good communication skills.

About the Company

SiTime

Fabless MEMS timing solutions provider

SiTime designs MEMS-based timing solutions (oscillators, network synchronizers, and jitter cleaners) as a fabless semiconductor company. MEMS resonators on silicon replace quartz to generate precise clocks and synchronize networks, with manufacturing handled by third-party foundries. The approach offers smaller size, lower power consumption, and better temperature stability, supported by scalable, design-focused development rather than in-house fabrication. Its goal is to expand MEMS timing adoption across automotive, industrial, IoT, mobile, aerospace, and telecom markets worldwide.

Company size
501-1,000
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
2005

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