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Synopsys

EDA software for chip design

Technical Engineer Intern

Silicon & ASIC DesignPosted on Nov 12
Internship · Winter 2027Ho Chi Minh City, VietnamNo salary listed

About the Job

Requirements

  • Currently pursuing a final-year undergraduate or graduate degree in Integrated Circuit Design, Electronics Engineering, Computer Engineering, or a related discipline.
  • Have a basic understanding of CMOS and digital logic design fundamentals.
  • Be proficient in scripting languages such as TCL, Perl, Python, or Shell.
  • Have strong analytical and problem-solving skills.
  • Have good written and verbal communication skills in English.
  • Be familiar with Linux/Unix environments and have experience with EDA tools such as Synopsys tools, Design Compiler, ESP, XA/HSPICE, or similar platforms.
  • Have strong teamwork and collaboration skills, with an interest in semiconductor technologies.

Responsibilities

  • Design and develop embedded memory compilers using industry-leading tools and methodologies.
  • Learn and apply transistor-level circuit design skills for memory compilers and SRAM architectures.
  • Work on memory technologies across process nodes, including bitcell analysis, schematic design, characterization, and compiler verification.
  • Develop scripting and automation solutions to improve engineering productivity and workflow efficiency.
  • Collaborate with experienced engineers to debug design- and test-related issues and resolve challenges.

Desired Qualifications

  • Knowledge of SRAM memory circuit design, including bitcell characteristics, sense amplifier design, and memory read and write operations, is a plus.
  • Familiarity with Linux/Unix environments and experience with EDA tools such as Synopsys tools, Design Compiler, ESP, XA/HSPICE, or similar platforms is advantageous.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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