Staff Analog Design Engineer

The successful candidate shall possess the capability to design and analyze high speed, high performance analog / mixed signal circuits, including data converters, PLLs, and SERDES, in advanced CMOS FinFET technologies. She or he shall bring the design all the way to production. 

Mandatory Knowledge/Skills/Abilities: 

• Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc. 
• Must have a proven tracking record of designing complex analog / mixed signal IPs or chips in deep submicron CMOS technologies. 
• Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high-frequency low-jitter PLL to production. 
• Must have a decent understanding in CMOS analog / mixed signal design methodologies and circuit analysis; 
• Must have a good understanding of device physics and the impacts of layout effects; 
• Able to perform the behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS; 
• Collaborative with other local or remote team members in a fast-paced professional environment. 

Preferred Knowledge/Skill/Abilities: 

• Fluent in verbal and written communications; 
• Independently resolves issues and conquer design challenges; 
• Self-motivated and detail-oriented; 
• Has the knowledge of (optical) communication theories and Matlab coding. 

Education and Experience Requirements:

• 5-10 years' experience in analog and mixed signal layout design.
  
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• Design, implement, and simulate the functionality and performance of various high-speed analog circuits, including the ADCs and DACs; 
• Create the layout floor plans to optimize the overall performance; Supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary; 
• Exploring the trade-offs of the different topologies and propose the best solution to achieve or exceed the requirements in terms of power/area/linearity/bandwidth, etc. 
• Develop the analog testing plans and work with the PE/TE teams to characterize the functionality and performance of the products to ensure the quality; 
• Need to support and comply with the team’s design methodologies and release flows.