Q

Quadric

GPNPU hardware and software for ML

Staff SoC Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeBurlingame, CA, USAHybrid

About the Job

Requirements

  • A Bachelor of Science, Master of Science, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field is required.
  • At least 5 years of hands-on SoC/ASIC front-end design and integration experience is required.
  • Proficiency in SystemVerilog or Verilog is required.
  • A strong background in computer architecture and low-power digital design techniques is required, along with deep technical knowledge in at least one subsystem: Memory, I/O, or Compute.
  • Experience with SoC subsystems, including third-party IP, and working knowledge of VCS and Verilog/C co-simulation are required.

Responsibilities

  • Own SoC-level subsystem development and integrate third-party IP, such as NoC, PCIe/UCIe interfaces, DDR, and Security.
  • Contribute to defining the SoC architecture by understanding its application requirements.
  • Package designs for customer releases and iterate based on customer feedback.
  • Own SoC-level Power, Performance, and Area (PPA) optimization strategies.
  • Apply low-power digital design techniques to optimize hardware efficiency.
  • Contribute to timing closure across the full product lifecycle, including front-end, back-end, and final tapeout stages.
  • Balance single-stream latency against scaled throughput performance.
  • Independently own SoC subsystem development and drive measurable PPA improvements.
  • Develop an in-depth understanding of the architecture and software interfaces to debug complex issues across the software/hardware stack.
  • Package and deliver design releases for customer evaluation and integration.

Desired Qualifications

  • Experience in logic synthesis and performance modeling.
  • Experience in FPGA design.
  • Familiarity with automotive safety standards (ASIL) and hardware security standards.

About the Company

Quadric

GPNPU hardware and software for ML

Quadric.io provides an integrated hardware-software platform for ML on System-on-Chips, centered on its Chimera General-Purpose Neural Processing Unit (GPNPU). Developers write ML code in C, which is compiled by the Chimera LLVM C Compiler, simulated with the Chimera Instruction Set Simulator (ISS), and deployed via a Software Development Kit (SDK) that supports design, profiling, and execution on Chimera. The solution is a single, end-to-end pipeline that eliminates the need to partition code across DSPs/GPUs and CPUs, offering tightly integrated hardware and software tools that can run a wide range of C-based neural-network operations. Quadric.io aims to simplify and accelerate the design of ML-enabled SoCs for semiconductor developers and manufacturers, enabling faster time-to-market and better ML performance through its cohesive hardware-software stack.

Company size
51-200
Company stage
Series C
Total funding
$94.3M
Headquarters
Burlingame, CA
Founded
2017

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