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NVIDIA

Designs the chips and software that power AI

Senior Applied Research Engineer - Accelerator Algorithms

Hardware EngineeringConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • A Bachelor of Science, Master of Science, or PhD in Computer Science, Electrical Engineering, Computer Engineering, Robotics, or a related field, or equivalent experience.
  • At least 12 years of experience in applied research, programmable accelerator algorithm design, computer architecture, or high-performance computing.
  • Experience with digital signal processors, single instruction multiple data, very long instruction word architectures, fixed-point arithmetic, memory hierarchy, and low-level performance optimization.
  • Experience with hardware/software co-design, workload characterization, performance modeling, benchmarking, and bottleneck analysis.
  • Familiarity with emerging physical artificial intelligence workloads such as vision-language-action models, multimodal perception, sensor processing, autonomous systems, or robotics systems.
  • Strong programming skills in C++, Python, CUDA, or similar environments.
  • Strong ownership, technical judgment, and ability to operate in ambiguous problem spaces.

Responsibilities

  • Research and characterize real-world autonomous vehicle and physical artificial intelligence workloads to identify algorithms that map well to the Programmable Vision Accelerator.
  • Develop and optimize accelerator algorithms using instruction-level parallelism, memory-aware scheduling, efficient data movement, and vectorized execution.
  • Translate workload and algorithm insights into requirements for accelerator hardware architecture, compilers, software development kits, profiling tools, and systems software.
  • Build prototypes, benchmarks, and performance models to evaluate accelerator algorithm performance across current and future hardware architectures.
  • Use modern artificial intelligence-assisted development tools and agentic workflows to accelerate workload analysis, algorithm creation, benchmarking, and performance exploration.
  • Partner with internal teams and customers to understand their systems and production workloads, and drive integration of accelerator algorithms into final products to deliver performance, power, and latency benefits.
  • Publish, present, and communicate technical findings across research and engineering teams where appropriate.
  • Influence future accelerator hardware architecture, programming model, compiler, software development kit, and systems software features.

Desired Qualifications

  • Hands-on experience with CUDA, Robot Operating System or ROS2, autonomous vehicle or robotics middleware, sensor processing frameworks, profiling tools, and heterogeneous compute pipelines.
  • A strong research track record in computer architecture, autonomous systems, or sensor processing.
  • Familiarity with safety-conscious development processes such as ISO 26262, IEC 61508, or similar standards.

About the Company

NVIDIA

Designs the chips and software that power AI

NVIDIA designs the chips and software that power artificial intelligence and sells complete data center systems to cloud providers, AI labs, and other businesses, along with GeForce graphics cards for gamers. Its GPUs, chips that perform thousands of calculations at once, became the main hardware for AI after researchers used them to train the AlexNet image-recognition model in 2012. NVIDIA connects many GPUs with its own processors and networking gear into servers and rack-sized computers, and developers program them through its CUDA software. These systems bring in most of its sales, and it also makes chips for cars and robots. Jensen Huang co-founded NVIDIA in 1993, and it is based in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1993

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