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Synopsys

EDA software for chip design

Validation / Verification Engineer – Senior Staff Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timePorto, PortugalNo salary listedIn-person

About the Job

Requirements

  • A Master's degree in Electrical Engineering, Computer Science, or an equivalent technical discipline.
  • At least 5 years applying automation or advanced test methodologies to hardware validation or product development.
  • Strong knowledge of mixed-signal integrated circuit concepts, including ADCs, DACs, PLLs, and high-speed I/O architectures.
  • Proficiency in Python for test automation, data analysis, and instrument control.
  • Hands-on experience with laboratory instruments such as oscilloscopes, signal generators, and network analyzers.
  • A solid understanding of transmission line theory, s-parameters, and signal integrity fundamentals.
  • Experience with UNIX/Linux environments and scripting.
  • Ability to diagnose failing tests by isolating setup, software, signal integrity, and device causes.
  • Ability to write clear, maintainable automation code and documentation for reuse.
  • Ability to clarify ambiguous test specifications and investigate results that conflict with circuit behavior.
  • Ability to communicate technical findings effectively to design engineers, including what was measured and what it means.
  • Ability to maintain laboratory equipment and test setups with discipline.

Responsibilities

  • Deploy AI and automation frameworks to characterize mixed-signal IP blocks, including HDMI, DisplayPort, and MIPI interfaces, reducing manual test time and improving coverage.
  • Design and build laboratory test setups, select instruments, design fixtures, and validate signal integrity across the measurement chain.
  • Operate high-end laboratory equipment, including oscilloscopes, arbitrary waveform generators, network analyzers, and protocol analyzers, to extract performance data from silicon.
  • Troubleshoot complex hardware and measurement issues across the device under test, test setup, automation scripts, and instrument configuration.
  • Interpret circuit schematics, layout files, and test specifications to validate IP performance against design requirements.
  • Document test procedures, results, and setup configurations for reproducibility and knowledge transfer across the global team.
  • Collaborate with hardware design engineers to improve test setups, propose measurement techniques, and close validation gaps.
  • Validate IP blocks that enable high-speed connectivity in devices such as smartphones and automotive systems.
  • Automate characterization workflows to reduce time-to-market and manual effort.
  • Identify signal integrity and performance issues early to prevent costly respins and customer escalations.
  • Build reusable test infrastructure for deployment across multiple IP families.
  • Provide design teams with performance data that informs architecture decisions and datasheet specifications.
  • Contribute to validation methodology improvements across the Porto lab and broader IP organization.

Desired Qualifications

  • Experience with Verilog or MATLAB.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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