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NVIDIA

Designs the chips and software that power AI

Archdesign Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeShanghai, ChinaNo salary listedIn-person

About the Job

Requirements

  • A master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field is required.
  • At least 2 years of experience in a related silicon, validation, characterization, productization, or engineering-tools role involving SoC, GPU, CPU, or similar systems is required.
  • Working knowledge of silicon speed, power, and quality concepts such as DVFS, Vmin/Fmax, shmoo, PDN/noise, binning, or guardband is required, along with willingness to learn DOE and prototype bring-up in a co-design setting.
  • Hands-on experience is required in at least one of the following: lab or post-silicon bring-up, experiment or characterization campaigns, manufacturing test or limits, or tools and pipelines that consume chip data.
  • Proficiency in Python or a similar tool for data analysis, automation, and validation is required, along with familiarity with Git and structured test/regression.
  • Ability to turn an ambiguous silicon question into a measurable experiment, communicate across teams, and write executable notes is required.
  • Ability to use AI to accelerate analysis, exploration, and documentation while maintaining rigor, originality, and independent judgment is required.

Responsibilities

  • Stand up silicon co-design prototypes and measurement setups to expose power-rail noise, circuit margin, performance, and binning behavior, from initial bring-up through repeatable experiments.
  • Plan and execute design of experiments by choosing factors and ranges such as voltage, frequency, workload, temperature, and process; define sample plans and success criteria; and analyze main effects and interactions.
  • Build Python pipelines and analyses that convert prototype, DOE, simulation, and characterization data—including power, noise, Vmin/Fmax, and binning yield—into traces, summaries, and inputs for firmware tuning, product specifications, and manufacturing limits, with checks for schema, units, corners, and SKU mapping.
  • Partner with architecture, design, validation, and firmware teams to add debug hooks, iterate on the prototype, and document what experiments proved and what still requires silicon.
  • Use secure, traceable, validated AI-assisted workflows for experiment planning, analysis, and documentation, with human oversight of conclusions that could affect limits, bins, or specifications.

Desired Qualifications

  • Experience running a test chip, prototype vehicle, or characterization DOE, with the ability to explain changes to a subsequent test matrix.
  • Direct experience with GPU, SoC, or CPU power, performance, binning, PDN/noise, or simulation-to-silicon correlation.
  • Experience shipping an internal tool, dashboard, or data pipeline using Python, databases, or web applications that is used by others.
  • Hands-on experience with LLMs in an engineering workflow, such as agents, retrieval-augmented generation, or evaluation, including debugging an incorrect or unsafe answer.
  • Exposure to firmware/BIOS parameters, eFuse/limits, or ATE/SLT screening and their relationship to product SKUs.
  • SQL or lightweight dashboard experience.

About the Company

NVIDIA

Designs the chips and software that power AI

NVIDIA designs the chips and software that power artificial intelligence and sells complete data center systems to cloud providers, AI labs, and other businesses, along with GeForce graphics cards for gamers. Its GPUs, chips that perform thousands of calculations at once, became the main hardware for AI after researchers used them to train the AlexNet image-recognition model in 2012. NVIDIA connects many GPUs with its own processors and networking gear into servers and rack-sized computers, and developers program them through its CUDA software. These systems bring in most of its sales, and it also makes chips for cars and robots. Jensen Huang co-founded NVIDIA in 1993, and it is based in Santa Clara, California.

Company size
10,001+
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
1993

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