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Positron

Memory-first AI inference silicon for LLMs

Performance & Debug Software Engineer - AI Inference

Applied Machine LearningUpdated on Nov 14
Full-timeRemote in USA

About the Job

Requirements

  • Strong C++ and Python skills, with hands-on experience profiling and optimizing complex systems that exercise Linux VFIO interfaces.
  • Deep understanding of memory hierarchy, concurrency, data movement, batching, scheduling, and performance measurement.
  • Hands-on experience using profilers, counters, traces, and statistical methods to distinguish signal from noise.
  • Demonstrated ability to debug across application, runtime, driver, firmware, and hardware boundaries.
  • Experience bringing up software on new silicon, and debugging and analyzing performance optimizations in customer production deployments.
  • Enthusiasm for AI-accelerated software development, including using coding agents and orchestrating subagents to move faster without compromising engineering outcomes.

Responsibilities

  • Profile and optimize latency, throughput, utilization, and efficiency across hardware-accelerated attention, accelerator configuration, the device runtime, host software, and on-device execution.
  • Use performance counters, hardware and software traces, telemetry, and simulation to isolate regressions and validate fixes.
  • Develop and optimize distributed inference capabilities, including efficient KV cache management and data movement across heterogeneous hardware.
  • Build representative benchmarks and workload traces that expose bottlenecks in compute, memory, chip-to-chip interconnect, networking, scheduling, and model loading.
  • Partner with test engineers embedded in the team to turn performance findings into durable regression tests and release gates.
  • Influence hardware and software architecture and interfaces where measured performance reveals a structural limitation.

Desired Qualifications

  • Experience with CUDA, HIP, Triton, GPU kernel development, distributed inference, or KV cache systems.
  • Familiarity with transformer inference, mixture-of-experts (MoE) models, model serving, FPGA or ASIC accelerators.
  • Working knowledge of Perfetto, Linux perf, eBPF, simulation, or hardware performance counters.

About the Company

Positron

Memory-first AI inference silicon for LLMs

Positron develops memory-first AI inference silicon and systems to scale large-language-model serving. Its Atlas systems rely on commodity LPDDR5X memory rather than expensive HBM/CoWoS to boost bandwidth and capacity, enabling more efficient LLM deployment at hyperscale. The company’s next-generation Asimov silicon (tape-out planned for late 2026; production in 2027) pairs compute with very large memory per chip (roughly 288 GB to 2,304 GB) and is designed to be combined into Titan configurations (four to eight Asimov chips) for extremely large models and long context windows. Positron has already deployed Atlas systems in the cloud, including 50+ racks at Oracle Cloud Infrastructure and partnerships with Parasail, Jump Trading, and i3d.net. Its goal is to provide scalable, memory-rich AI inference hardware that lowers cost and increases throughput for serving large language models.

Company size
51-200
Company stage
Series C
Total funding
$1.2B
Headquarters
Reno, NV
Founded
2023

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