A

Altera

FPGA and SoC provider with software

Physical Design Engineer

Full-Time
No salary listed
Mid
Hyderabad, Telangana, India
In Person
Hardware EngineeringSilicon & ASIC Design

About the job

Responsibilities
  • Perform physical design implementation of custom IP and system-on-chip designs from register-transfer level to graphic database system to create a design database ready for manufacturing.
  • Conduct all aspects of the physical design flow, including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power and clock distribution, reliability analysis, and power and noise analysis.
  • Conduct verification and signoff, including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity analysis, layout verification, electrical rule checking, and structural design checking.
  • Analyze results and make recommendations to fix violations for current and future product architecture.
  • Apply expertise in structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power-domain analysis, placement, routing, synthesis, and design-for-test.
  • Optimize designs to improve product-level power, frequency, and area parameters.
  • Participate in the development and improvement of physical design methodologies and flow automation.

About the company

Altera designs and manufactures Field-Programmable Gate Arrays (FPGAs) and System-on-Chips (SoCs) and sells design software. Its programmable logic devices let customers configure hardware after manufacturing to fit specific applications, supported by toolchains for hardware design and deployment. It serves automotive, communications, aerospace, and expanding sectors like AI, cloud, and edge computing, focusing on flexible, high-performance processing solutions. As an independent company after separating from Intel, its goal is to help customers bring customized hardware to market quickly by providing both configurable silicon and the software to design for it.

Company Size

N/A

Company Stage

IPO

Headquarters

San Jose, California

Founded

1983

Simplify Jobs

Simplify's Take

What believers are saying

  • September 2026 board additions and Nishit Sahay’s CIO hire strengthen execution.
  • September 2026 PQC, DDR5, and Agilex updates improve product relevance immediately.
  • October 2026 hiring remains broad, signaling expansion across engineering, sales, and operations.

What critics are saying

  • Altera filed a confidential S-1 on September 15, 2026; IPO demand decides financing.
  • Intel still owns 49%, keeping governance tension and strategic ambiguity alive.
  • NVIDIA, AMD, and custom ASICs compress FPGA adoption; one weak quarter can freeze growth.

What makes Altera unique

  • Altera remains the largest pure-play FPGA provider after Silver Lake’s 2025 separation.
  • Agilex 3, 5, and 7 add PQC security, DDR5, and low-latency connectivity.
  • Rutronik, Riverlane, and Pantherun partnerships extend Altera’s reach into Europe, quantum, and networking.

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Benefits

  • Performance Bonus

Company News

Yahoo Finance
Oct 28th, 2026
Altera launches Agilex 2X, a four-family FPGA portfolio for AI, aerospace and edge systems

Altera Corporation, the largest pure-play FPGA provider, announced Agilex 2X on October 28, 2026. The portfolio of programmable chips targets AI infrastructure, networking, aerospace and defence, robotics, and edge systems. It spans four device families, from high-performance to low-power and I/O-focused chips. Agilex 27, the first family, offers 1.8X better performance per watt than the prior generation, with transceivers up to 256 Gbps and post-quantum-ready security. All devices use the Quartus Prime software, now extended by QuartusIQ, an AI design assistant. QuartusIQ is available for download in Quartus Prime version 26.3. Early access customers get Agilex 27 software support in mid-November. Engineering sample silicon is expected in the second half of 2027.

Business Wire
Oct 21st, 2026
Altera demos 100G FPGA Holoscan sensor bridge for real-time ultrasound at NVIDIA GTC Berlin

Altera, the largest pure-play FPGA provider, is demonstrating its 100G FPGA-based Holoscan Sensor Bridge solution at NVIDIA GTC Berlin. The demo, built by Yuan, shows live ultrasound imaging from raw sensor data to insights. The setup pairs a Texas Instruments Ultrasound EVM with a Yuan NEAR 7TX T7000-based system. Altera's FPGAs move sensor data to GPUs with low latency, while NVIDIA Holoscan coordinates the data flow and image processing. The demo coincides with NVIDIA's launch of Holoscan 5, which extends the platform from perception to ultra-low-latency, real-time control. "FPGAs, with their flexible I/O and deterministic, low-latency behavior, are central to physical AI because they provide the bridge between sensors and the GPU," said Farhad Shafai, head of Business Solutions and Marketing at Altera.

Yahoo Finance
Oct 21st, 2026
Altera launches QuartusIQ AI companion to make FPGA design cycles up to 1.5X faster

Altera Corporation, the largest pure-play FPGA provider, today launched QuartusIQ, an AI companion for its Quartus Prime Pro software. Engineers use natural-language prompts to create, debug, validate and close timing on FPGA designs. Altera expects up to 1.5X faster total design cycles, based on its internal analysis. On a 24-month cycle, that could save several months. QuartusIQ reads the active project, including device, IP, constraints, reports and timing data. It also supports Physical AI designs for robotics, industrial automation and autonomous machines. It is optimised to run on NVIDIA DGX Station for Windows, which lets companies keep sensitive design data on premises. Cloud deployment is also supported. QuartusIQ will arrive in Quartus Prime Pro v26.3, to be released at Altera Innovators Day on October 28, 2026.

Altera
Oct 21st, 2026
Altera's 100G fpga-based Holoscan Sensor Bridge solution on display at NVIDIA GTC Berlin.

Altera's 100G fpga-based Holoscan Sensor Bridge solution on display at NVIDIA GTC Berlin. Altera Agilex FPGAs Provide the Flexible, Deterministic Sensor-to-GPU Data Path for Medical Physical AI SAN JOSE, Calif., October 21, 2026 Altera, the largest pure-play FPGA provider with a full-spectrum portfolio, today announced that its 100G FPGA-based Holoscan Sensor Bridge solution is being demonstrated at NVIDIA GTC Berlin as part of a Yuan ultrasound raw-to-insights live demonstration. Built by Yuan, the Altera FPGA-based Terasic sensor aggregation platform pairs a Texas Instruments Ultrasound EVM with a Yuan NEAR 7TX T7000-based system, combining sensor connectivity through the NVIDIA Holoscan Sensor Bridge with a real-time image-processing pipeline for low-latency visualization. The demonstration illustrates NVIDIA Holoscan's raw-to-insights approach for medical technology, using GPU-accelerated processing and AI to transform raw sensor data from modalities such as ultrasound, multispectral imaging, Bayer-pattern color imaging, and computed tomography into information that can support clinical workflows. Altera FPGAs provide flexible I/O, high-speed connectivity, and deterministic data movement needed to transport that data into GPU platforms for real-time processing and AI inference, while NVIDIA Holoscan coordinates the data flow and image-processing pipeline. "Medical devices are entering an era in which raw sensor data can move directly into advanced compute platform, enabling unprecedented diagnostics capability," said Farhad Shafai, head of Business Solutions and Marketing at Altera. "FPGAs, with their flexible I/O and deterministic, low-latency behavior, are central to physical AI because they provide the bridge between sensors and the GPU. Altera brings high-speed connectivity capabilities to that bridge, helping system developers build medical devices that are more capable, adaptable, and supporting ecosystem to build faster time to market solutions." Holoscan 5 extends the platform to real-time control The demonstration coincides with NVIDIA's introduction of Holoscan 5 at GTC Berlin. Holoscan 5 expands NVIDIA Holoscan from a perception-oriented software development kit into a platform that can also support ultra-low-latency, real-time control to create a unified runtime. For medical technology developers, Holoscan 5 creates an opportunity to build products that combine high-performance sensing, real-time control, and agentic AI. Within the Holoscan ecosystem, medical imaging developers can establish a direct sensor-to-GPU path, while Altera FPGAs enable 100G, high-speed, low-latency sensor aggregation. Instead of relying solely on legacy proprietary platforms, developers can use software-defined architectures that expose more of the data path to modern algorithms and enable faster iteration across the device lifecycle. Altera Holoscan Sensor Bridge Solutions Altera's Holoscan Sensor Bridge solutions are designed to make FPGAs the data plane for physical AI. Altera FPGAs can aggregate diverse sensor interfaces, perform protocol conversion, timestamping, preprocessing, early fusion, and stream data efficiently to NVIDIA GPUs through standardized Holoscan interfaces. Altera's FPGA portfolio spans sensor-bridge solutions from 10G to 100G, including multiple reference designs with different MIPI and RF combinations for high-bandwidth AI applications. By combining flexible FPGA fabric, high-speed Ethernet and direct sensor connectivity, Altera helps developers reduce CPU-mediated copies and scheduling variability while maintaining a deterministic, low-latency path from sensor to compute. This approach supports medical imaging, robotics, industrial automation and other physical AI applications in which sensor data must move quickly and predictably into AI and control workloads. About Altera Altera provides high-performance, programmable compute and connectivity solutions that enable the rapid adoption and continued advancement of transformative technologies across a wide range of advanced and AI-enabled systems. Altera is the largest pure-play FPGA provider with a full-spectrum portfolio serving applications ranging from data centers and communications networks to critical embedded systems. Media Contacts:

TMCnet
Oct 21st, 2026
Altera Launches QuartusIQ, An AI Expert Companion for Quartus Prime Software

Altera Launches QuartusIQ, An AI Expert Companion for Quartus Prime Software TMCnet News [October 21, 2026] | / | Altera Launches QuartusIQ, An AI Expert Companion for Quartus Prime Software Altera Corporation, the largest pure-play FPGA provider with a full-spectrum portfolio, today introduced QuartusIQ, an AI expert companion for Quartus Prime Pro software designed to accelerate the complete FPGA development flow. QuartusIQ helps FPGA developers apply expert guidance and repeatable workflows within Quartus Prime, enabling users to create, debug and validate designs more efficiently, resolve issues with greater confidence and move from design intent to signoff faster. Learn more about QuartusIQ With QuartusIQ, developers use natural-language prompts to work through design tasks and automate routine analysis. Because it understands the active Quartus project, including device, IP, constraints, reports and timing data, QuartusIQ can help identify the next steps for meeting timing and completing verification, while engineers remain in control of key design decisions. Altera expects QuartusIQ to help developers shave months off the path to production, with up to 1.5X faster[1] total design cycles through simpler development and faster design closure. On a 24-month design cycle, that level of improvement could represent several months saved. "FPGA developers are under increasing pressure to deliver more capable designs while managing growing device, IP, timing and verification complexity," said Farhad Shafai, head of Business Solutions and Marketing at Altera. "Agentic AI brings expert guidance and workflow automation into the development environment, helping engineers spend less time searching for information and coordinating routine tasks, and more time making the design decisions that move products toward production. With QuartusIQ, customers can apply project-aware FPGA expertise across the design flow while keeping engineers in control." Project-Aware Guidance for Physical AI Workflows Using an open-standard Model Context Protocol (MCP) interface, QuartusIQ connects AI agents with the Quartus development environment and supported tools. The interface enables agents to access the developer's active project context and relevant Altera resources, including information about the FPGA, IP, boards, interfaces, reference designs, and documentation. Agents can then give accurate, design-aware help with configuring IP, writing constraints, and resolving compilation and timing issues, all from inside the developer's existing workflow. QuartusIQ extends its project-aware assistace to Physical AI design, helping engineers refine FPGA implementations and prepare validated designs for deployment in applications such as robotics, industrial automation and autonomous machines. For example, an engineer developing an autonomous mobile robot could use QuartusIQ to examine an active project that includes camera, LiDAR, radar, inertial-sensor and motor-control interfaces, then prioritize compile, verification and timing issues for the next iteration. This can help move the design from system intent toward a validated FPGA implementation for edge deployment. QuartusIQ Run-Time Harness: Native FPGA Workflow Orchestration Enhancing developer productivity and ease of use, QuartusIQ includes a run-time harness that orchestrates AI-assisted workflows directly within the Quartus GUI. Grounded in the active project and QuartusIQ skills, the harness coordinates multi-step tasks, invokes relevant Quartus tools and skills through MCP-connected interfaces, evaluates compile, verification and timing results, and guides the next action. This closed-loop workflow enables engineers to move from natural-language intent to analysis and iterative design refinement without manually coordinating separate tools, while remaining in control of consequential design decisions. QuartusIQ supports customer-selected frontier and open-weight models where supported, with deployment options in the cloud or on premises. This flexibility allows teams to choose models based on capability, latency, cost and deployment requirements while using the same integrated Quartus workflow. On-Premises Deployment with NVIDIA DGX Station for Windows QuartusIQ is optimized to run on NVIDIA DGX Station for Windows, providing an on-premises environment for AI-assisted FPGA development that helps keep sensitive design data and intellectual property within an organization's own infrastructure. Supported open-weight NVIDIA Nemotron models can run locally, enabling QuartusIQ agents to help teams create designs, debug issues and close timing. NVIDIA DGX Station for Windows is the ultimate deskside AI supercomputer to build and run powerful AI agents connected to enterprise applications and workflows. Powered by NVIDIA GB300 Grace Blackwell Ultra Desktop Superchip and a massive 748 GB of coherent memory, the system runs frontier AI models and many parallel agents across productivity, creative, design, engineering and physical AI applications, with RTX-accelerated visualization. "Agentic AI will help engineers tackle increasingly complex FPGA software workflows and move from design intent to validated implementations faster," said Chris Marriott, vice president, Enterprise Platforms, NVIDIA. "Together with Altera, we're optimizing our Nemotron models for QuartusIQ's specialized capabilities. Running this agentic AI locally on the DGX Station gives engineers the ultimate deskside supercomputer to accelerate development without ever having to compromise the security of their sensitive IP." Availability QuartusIQ, including QuartusIQ AI Expert Companion native GUI support, MCP, the Visual Studio Code extension with agent harness, and Skills will be available in Quartus Prime Pro software v26.3, set to be released at Altera Innovators Day on October 28, 2026. About Altera Altera provides high-performance, programmable compute and connectivity solutions that enable the rapid adoption and continued advancement of transformative technologies across a wide range of advanced and AI-enabled systems. Altera is the largest pure-play FPGA provider with a full-spectrum portfolio serving applications ranging from data centers and communications networks to critical embedded systems. 1 Based on Altera's internal analysis of representative FPGA design workflows, compared with completing the same tasks manually in Quartus Prime without QuartusIQ. Performance varies by use, configuration and other factors. Performance results are based on testing as data shown in configurations and may not reflect all publicly available updates. View source version on businesswire.com: https://www.businesswire.com/news/home/20261021169844/en/ [ Back To TMCnet.com's Homepage] |