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Quest Global

Engineering services, digital transformation, asset management

Physical Design General Manager - Physical Design

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeBengaluru, Karnataka, IndiaNo salary listedIn-person

About the Job

Requirements

  • 15–22 years of hands-on experience in physical design implementation.
  • Experience building and leading large SoC design teams and successfully driving multiple complex SoCs to tape-outs on advanced technology nodes.
  • Deep expertise in physical design tools and flows covering synthesis, static timing analysis, place-and-route, and signoff, such as Synopsys Fusion Compiler, ICC2, PrimeTime, ICV, Cadence Innovus/Tempus, Ansys RedHawk, Calibre, UPF, and CLP.
  • Strong grasp of low-power flows, multi-voltage and multi-Vt, UPF, and power-intent checks.
  • Experience managing or technically driving multiple successful tape-outs, including full-chip or subsystem projects.
  • Strong scripting skills in Tcl and Python, and ability to drive flow optimizations.
  • Problem-solving, debugging, and documentation skills.
  • Communication skills.
  • Ability to motivate team members and build strong relationships and trust with customers based on technical capabilities and committed deliverables.

Responsibilities

  • Lead and drive end-to-end RTL-to-GDSII flows tailored to customer-specific technology, tools, and deliverables, and independently drive projects with minimal customer support.
  • Lead complex top-level, subsystem, and block-level execution while ensuring quality and signoff compliance.
  • Guide floorplan strategy, power planning, PPA closure, IR/EM signoff, and integration challenges.
  • Understand customer requirements and provide technical solutions, execution strategies, resource planning, tracking, reporting, and risk mitigation, and handle dynamic situations in real time.
  • Interface with customer architects and stakeholders for reviews, issue resolution, milestones, and weekly reviews, and build trust and confidence in the team’s competency and capability.
  • Mentor physical design teams on advanced technology-node implementation, complex SoC partitioning, tool optimizations, low power, STA, EMIR, and PV convergence.
  • Review block-level signoff issues and methodology gaps, and drive technical excellence across projects.
  • Propose efficiency improvements, including flow enhancements, checklists, automation scripts, and ECO methodologies.
  • Understand customer challenges and propose solutions such as low-power implementation using UPF, hierarchical signoff closure, and flow correlation across synthesis, STA, and physical-design domains.

About the Company

Quest Global

Engineering services, digital transformation, asset management

QuEST Global provides engineering and lifecycle services across aerospace, automotive, energy, healthcare, and transportation, focusing on digital transformation and asset management. It uses edge computing, cloud, AI/ML, and industrial IoT to deliver tailored engineering solutions through long-term partnerships, service contracts, project-based engagements, and strategic collaborations. It differentiates itself with a broad industry footprint, global delivery model, and emphasis on partnerships, talent development, and workplace culture. Its goal is to help clients improve operational efficiency and drive business growth by transforming engineering processes and assets with digital tools and data-driven management.

Company size
10,001+
Company stage
Growth Equity (Venture Capital)
Total funding
$581M
Headquarters
Greenville, SC
Founded
1997

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