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Broadcom

Designs chips and software for data centers

ASIC DFT Engineer

Hardware Validation & TestingPosted on Nov 9
Full-timeSan Jose, CA, USAIn-person

About the Job

Requirements

  • A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, with 10+ years of experience.
  • Strong design-for-test (DFT) background, such as IO and analog DFT, automatic test pattern generation (ATPG), scan, or built-in self-test (BIST).
  • Background in scan insertion and scan compression, using tools such as DFT Compiler or Mentor TestKompress.
  • Experience with logic BIST design and debug.
  • Knowledge of ATPG vector generation, simulation, and debug, using tools such as TetraMax or Fastscan.
  • Experience in Verilog coding, testbench generation, and simulation.
  • Experience with memory BIST insertion and verification for SRAM, CAM, or eDRAM.
  • Ability to work in a multidisciplinary, cross-department environment.
  • Solid knowledge of analog and digital circuit design and device physics fundamentals.
  • Understanding of silicon processing, logical and physical synthesis, and transistor reliability principles.
  • Strong problem-solving, debugging, root-cause analysis, and communication skills.
  • Basic coding or scripting skills in TCL, Perl, Python, C++, or Verilog.

Responsibilities

  • Define appropriate DFT specifications for the ASIC based on Broadcom and customer DFT feature requirements and DPPM goals.
  • Implement DFT, including scan, MBIST, TAP, LBIST, IO, SerDes, and other IP DFT integration.
  • Work with STA and DI engineers on design closure for test.
  • Generate, verify, and debug test vectors before tape release.
  • Validate and debug test vectors on ATE during silicon bring-up.
  • Assist with silicon failure analysis, diagnostics, and yield improvement efforts.
  • Interface with customers and global physical design and test engineering/manufacturing teams.
  • Work with IP DFT engineers and other stakeholders.
  • Debug customer-returned parts on the ATE.
  • Develop newer DFT solutions to address testability problems in 3nm and beyond.
  • Automate DFT and test-vector generation flows.
  • Participate in SoC DFT implementation, verification, and debug, including post-silicon bring-up.

Desired Qualifications

  • Experience working on ATE.

About the Company

Broadcom

Designs chips and software for data centers

Broadcom designs chips and sells infrastructure software for the companies that run large data centers, telecom networks and corporate IT. Its custom AI processors, built with cloud companies, and its Ethernet switch chips move and process data inside the computer clusters that train AI models. The chip business also makes parts for broadband, wireless, storage and industrial equipment, sold to device makers and cloud operators, while VMware software lets businesses run private clouds and is sold by subscription. Broadcom took its current form in 2016, when Avago Technologies, formed in 2005 from Agilent's chip unit, bought Broadcom Corporation, and it is based in Palo Alto, California.

Company size
10,001+
Company stage
IPO
Headquarters
Palo Alto, CA
Founded
2005

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