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SiTime

Fabless MEMS timing solutions provider

ASIC Digital Verification Engineer

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timeOttawa, ON, CanadaIn-person

About the Job

Requirements

  • Understand standard specifications, functional specifications, and feature enhancements to create and execute detailed verification plans.
  • Know SystemVerilog and Universal Verification Methodology environments for digital verification.
  • Have experience with Synopsys and/or Cadence simulation tools.
  • Have experience with SystemVerilog assertions, functional coverage, and code coverage.
  • Be able to work in a Unix/Linux operating system environment.

Responsibilities

  • Define and implement self-checking test cases based on functional requirements.
  • Contribute to verification infrastructure components.
  • Triage regressions; debug RTL and gate-level simulations; analyze coverage; and work with other teams to resolve issues and achieve verification closure.
  • Work with diverse design and verification team members, both local and remote.

Desired Qualifications

  • Be a fast learner and able to work under minimal supervision.
  • Be an effective team player with good communication skills.

About the Company

SiTime

Fabless MEMS timing solutions provider

SiTime designs MEMS-based timing solutions (oscillators, network synchronizers, and jitter cleaners) as a fabless semiconductor company. MEMS resonators on silicon replace quartz to generate precise clocks and synchronize networks, with manufacturing handled by third-party foundries. The approach offers smaller size, lower power consumption, and better temperature stability, supported by scalable, design-focused development rather than in-house fabrication. Its goal is to expand MEMS timing adoption across automotive, industrial, IoT, mobile, aerospace, and telecom markets worldwide.

Company size
501-1,000
Company stage
IPO
Headquarters
Santa Clara, CA
Founded
2005

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