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Positron

Memory-first AI inference silicon for LLMs

Modeling & Simulation Engineer

Systems Software EngineeringPosted on Sep 11
Full-timeRemote in USA

About the Job

Requirements

  • Strong software engineering skills in a systems language such as C++ or Rust, with experience building simulators, performance models, emulators, or comparable systems tools.
  • Deep understanding of processors, memory hierarchies, interconnects, concurrency, and the effects of data movement and contention on performance.
  • Experience designing and validating models with explicit goals for fidelity, determinism, and execution speed, and sound judgment about what to model or abstract.
  • Strong applied mathematics and quantitative reasoning skills, with the ability to turn workload behavior into useful models and experiments.
  • Ability to integrate complex software systems, debug interactions across components, and build maintainable tools that other engineers can use effectively.
  • Clear technical writing and communication, including documenting assumptions, explaining discrepancies, and presenting architecture tradeoffs.
  • Bachelor's, master's, or PhD in Computer Science or Electrical Engineering, or a related field.
  • Currently authorized to work in the United States.

Responsibilities

  • Develop analytical models of inference workloads to evaluate latency, throughput, utilization, and compute, memory, and communication bottlenecks.
  • Build and extend functional and timing models of accelerator compute, memory, data movement, interconnects, and control processors, balancing model fidelity with simulation speed.
  • Integrate accelerator models with virtual platforms and host interface models to support realistic software workloads and connected simulation environments.
  • Compare current and proposed architectures through reproducible experiments, and communicate the assumptions and limits behind each result.
  • Keep simulator interfaces aligned with production firmware, runtime, and host software so workloads, diagnostics, and tests can carry forward to hardware.
  • Validate numerical behavior and timing assumptions against reference implementations and available hardware results, and build automated regression coverage that distinguishes functional correctness from performance accuracy.
  • Improve simulator speed and usability through configuration tools, checkpointing, deterministic execution, tracing, observability, and test automation.
  • Collaborate closely with hardware and software architects on command semantics, scheduling assumptions, and model interfaces, keeping simulator behavior consistent with architectural specifications and execution software.
  • Partner with compiler, firmware, runtime, performance, and test engineers to turn models into practical development and qualification environments.

Desired Qualifications

  • Experience with one or more of SystemC, Arm Fast Models (LISA), QEMU, gem5, or custom event-driven or cycle-level simulation frameworks.
  • Experience modeling AI inference workloads, including tensor operations, quantization, memory traffic, and token-generation performance.
  • Familiarity with embedded Linux, firmware or runtime integration, device models, PCIe, or direct memory access.
  • Experience with performance traces and visualization tools such as Perfetto, model calibration, distributed simulation, or test orchestration at scale.
  • Experience with functional programming in languages such as Haskell or Lean, and the ability to work with domain-specific command languages used to model and control accelerator execution.

About the Company

Positron

Memory-first AI inference silicon for LLMs

Positron develops memory-first AI inference silicon and systems to scale large-language-model serving. Its Atlas systems rely on commodity LPDDR5X memory rather than expensive HBM/CoWoS to boost bandwidth and capacity, enabling more efficient LLM deployment at hyperscale. The company’s next-generation Asimov silicon (tape-out planned for late 2026; production in 2027) pairs compute with very large memory per chip (roughly 288 GB to 2,304 GB) and is designed to be combined into Titan configurations (four to eight Asimov chips) for extremely large models and long context windows. Positron has already deployed Atlas systems in the cloud, including 50+ racks at Oracle Cloud Infrastructure and partnerships with Parasail, Jump Trading, and i3d.net. Its goal is to provide scalable, memory-rich AI inference hardware that lowers cost and increases throughput for serving large language models.

Company size
51-200
Company stage
Series C
Total funding
$1.2B
Headquarters
Reno, NV
Founded
2023

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