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Velaura

Designs energy-efficient AI silicon and systems

Power Management Architect

Silicon & ASIC DesignConfirmed live in the last 24 hours
Full-timeSanta Clara, CA, USA$200k - $300k /yrIn-person

About the Job

Requirements

  • At least 8 years of experience in power management, mixed-signal, or SoC architecture, including significant experience defining power architecture for shipping silicon or embedded platforms.
  • Expertise in low-power design techniques, including multiple power domains, dynamic voltage and frequency scaling, clock and power gating, adaptive voltage scaling, retention, and power state management.
  • Strong understanding of power delivery networks, power management integrated circuits, voltage regulation, and interactions among power, thermal, and package constraints.
  • Hands-on experience with power intent and low-power methodology, such as UPF or CPF, and power modeling and analysis across the SoC design flow.
  • Experience working across silicon design, firmware, and platform software to define and validate power management policies from architecture through silicon bring-up.
  • Bachelor’s or advanced degree in Electrical or Computer Engineering or a related field, or equivalent practical experience.
  • Excellent written and verbal communication skills, with a track record of influencing technical direction and mentoring engineers.

Responsibilities

  • Own the SoC power architecture by defining power domains, voltage/frequency scaling strategy, power states, and the power delivery network across the silicon roadmap.
  • Define dynamic and static power management techniques, including clock and power gating, adaptive voltage scaling, body biasing, and retention strategies, to maximize performance per watt for AI and real-time workloads.
  • Establish power and energy budgets and model them across use cases; drive power, performance, and area trade-offs with architecture, design, and product teams.
  • Architect the on-die power management and control subsystem, including the power management integrated circuit interface, power management controller, sensors, telemetry, and the firmware/software policies that drive it.
  • Partner with silicon design, firmware, thermal, package, and platform software teams to embed power intent, such as UPF, into the design flow and validate it through implementation and silicon bring-up.
  • Define power and thermal management for sustained real-world operation, including thermal throttling, energy-aware scheduling, and safe operating limits.
  • Establish power architecture standards, modeling methodology, and review practices; mentor engineers and raise the power-engineering bar across the organization.

Desired Qualifications

  • Experience optimizing power for AI/machine-learning accelerators or neural processing units and real-time or latency-sensitive edge workloads.
  • Familiarity with robotics, automotive, mobile, or other power- and thermally-constrained domains, and with battery and energy-storage considerations.
  • Experience with energy-aware software/firmware, thermal management, and silicon power characterization and correlation.
  • Prior experience at an early-stage or high-growth semiconductor or hardware company, building power architecture and methodology from the ground up.

About the Company

Velaura

Designs energy-efficient AI silicon and systems

Velaura AI designs and manufactures ultra-energy-efficient AI infrastructure, including 3nm ASIC chips, Teraflux mining systems, FluxVision fleet-management software, and AuraLinks rack-level networking. Customers deploy the hardware in data centers, while FluxVision monitors and manages fleets; EnergyTune and AutoTune dynamically adjust power to meet grid stability, and AuraLinks reduces bottlenecks in AI training and inference. The company differentiates itself with a team of silicon architects from Apple, Google, and Qualcomm, plus a patent-pending energy-management approach and a fully integrated hardware-software stack. Its goal is to enable massive AI deployment by delivering powerful, energy-efficient compute and networking that aligns with sustainable energy grids and domestically produced technology.

Company size
51-200
Company stage
Series A
Total funding
$424M
Headquarters
Santa Clara, CA
Founded
2022

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