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Synopsys

EDA software for chip design

Applications Engineering Senior Engineer

Solution EngineeringConfirmed live in the last 24 hours
Full-timeHyderabad, Telangana, IndiaNo salary listed

About the Job

Requirements

  • A Bachelor's degree in Electronics Engineering or a related field with at least 2 years of experience in verification or digital design, or a Master's degree in Electronics.
  • Strong fundamentals in digital design and hands-on experience with Verilog or VHDL.
  • Working knowledge of SystemVerilog and dynamic simulation concepts, including testbench development and debug.
  • Proficiency in UNIX or Linux environments and scripting with Tcl, Python, or Perl.
  • Strong written and verbal communication skills for interfacing directly with customers, understanding their challenges, and explaining technical solutions clearly.

Responsibilities

  • Support customers using Synopsys verification tools such as VCS and Verdi by diagnosing simulation issues, debug challenges, and coverage gaps in their design flows.
  • Analyze customer testbenches and design environments to identify root causes of verification failures and propose technical solutions that fit their methodology.
  • Work on verification challenges involving SystemVerilog, UVM, low power verification, and coverage-driven workflows across diverse customer projects.
  • Collaborate with Synopsys R&D teams to escalate complex issues, contribute to product improvements, and bring customer feedback into the development cycle.
  • Build scripts in Tcl, Python, or Perl to automate workflows, replicate customer issues, or demonstrate best practices.
  • Guide customers through tape-out cycles by resolving verification bottlenecks to help them stay on schedule.
  • Travel occasionally to customer sites for onsite technical engagements, training, or critical project support.

Desired Qualifications

  • Experience with Synopsys tools such as VCS or Verdi is a strong plus.
  • Exposure to UVM, coverage-driven verification, or low power verification flows is advantageous.

About the Company

Synopsys

EDA software for chip design

Synopsys provides software tools and services for electronic design automation (EDA), helping engineers design, simulate, verify, and optimize semiconductor chips and systems. Its products cover the full design flow, including RTL-to-gating synthesis, place-and-route, timing analysis, verification, and silicon validation, as well as software integrity solutions and hardware-assisted verification. Engineers use these tools to model, simulate, and validate complex chip designs before manufacturing, reducing bugs and improving performance. Compared with many competitors, Synopsys differentiates itself through its broad, end-to-end design toolchain, large ecosystem of IP and integration with simulation and modeling capabilities gained from its 2025 merger with ANSYS, and its global scale and support. The company aims to help designers push the boundaries of chip and system performance, accelerate time-to-market, and enable silicon-to-systems design across a wide range of industries.

Company size
10,001+
Company stage
IPO
Headquarters
Sunnyvale, CA
Founded
1986

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