C

Cisco

Makes networking gear and security software

ASIC Engineering Design Verification Leader

Hardware Validation & TestingConfirmed live in the last 24 hours
Full-timePune, Maharashtra, IndiaNo salary listedIn-person

About the Job

Requirements

  • Build UVM components, including agents, drivers, monitors, scoreboards, and sequences, and implement constrained-random and directed test strategies.
  • Understand coverage metrics and functional specifications.
  • Understand and implement verification scenarios according to full-chip analog and digital verification test plans.
  • Analyze coverage, add scenarios to improve it, debug functional simulations, add corner verification cases, and identify and resolve functional bugs.
  • Perform firmware/C coding and verification of CPU subsystems with firmware.
  • Use Python and C, and develop scripts for automated analysis and reports.
  • Understand RTL digital design and Design for Test principles.
  • Hold a Bachelor's or Master's degree in Electronics Engineering or an equivalent or related field.
  • Have 8–12 years of functional verification experience.
  • Have strong skills in SystemVerilog, Python, C, and UVM methodology.
  • Be familiar with UVM phases, configuration mechanisms, factory overrides, and reuse across block, subsystem, and SoC-level verification.
  • Understand CPU subsystems, FPGA, ODSP and integrated transceiver features, SerDes, Ethernet, and D2D PHY IP and protocols.
  • Have experience with RTL design, simulation tools such as Synopsys, Cadence, or Mentor Graphics, and ASIC design flow.
  • Have strong analytical, problem-solving, and debugging skills.
  • Have strong teamwork, communication, and organizational skills, and be able to drive decisions quickly through consensus building.

Responsibilities

  • Create verification documentation during the concept phase and work with senior engineers to define verification methodology and develop testbench components.
  • Perform block-level verification during the initial design phase, then transition to full-chip verification.
  • Run block- and chip-level verification with integrated high-speed IPs, including ODSP, D2D IP, SerDes XSR, SerDes PAM4 integrated drivers/TIA, and control functions.
  • Develop functional coverage models and assertions, and debug complex verification issues within a UVM-based framework.
  • Before tapeout, run functional scenarios with CPU firmware loaded and verify functionality at the CPU subsystem level.
  • Participate in FPGA verification as needed.
  • After silicon, contribute to the ATE test plan and test-vector generation, perform ATE testing, and support release to production.

About the Company

Cisco

Makes networking gear and security software

Cisco makes the switches and routers that connect offices, data centers, and cloud services, and it also sells cybersecurity tools and Webex video meetings to businesses and governments. It was one of the first companies to sell routers that let different kinds of computer networks exchange data, and in 2000 it briefly became the world's most valuable company. Customers run its network gear, from Wi-Fi access points to AI data center systems, with Cisco software that sets up and secures the network, while its Splunk unit searches computer logs to catch outages and attacks. Cisco earns money from hardware sales, software subscriptions, and support contracts. It was founded in 1984 and is based in San Jose, California.

Company size
10,001+
Company stage
IPO
Headquarters
San Jose, CA
Founded
1984

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