Lead Pre-Silicon Verification & Post-Silicon Validation Architect

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SERVER PLATFORM FIRMWARE VALIDATION ARCHITECT 

THE ROLE:
Join our validation architecture team as a Lead Test Architect focused on defining verification methodologies, validation strategies, and automation-ready test frameworks for next-generation server and accelerator platforms. You will partner with SoC, platform, and validation architects to develop coverage models, identify validation gaps, and build scalable test content that executes across both pre-silicon and post-silicon environments. This role emphasizes validation architecture, coverage development, root-cause analysis, and automated verification infrastructure for AMD EPYC CPUs and Instinct accelerators used in enterprise and data center markets. We welcome candidates with backgrounds in firmware validation, platform validation, SoC validation, silicon validation, or pre-silicon verification who are passionate about improving product quality through innovative validation methodologies.

AI-first engineering is a core expectation for this role. Candidates must demonstrate the ability to effectively leverage generative AI, engineering copilots, automation agents, and data-driven tools to improve productivity, accelerate validation, enhance quality, and drive innovation across the firmware verification lifecycle

THE PERSON:  

You are a pragmatic problem solver who enjoys digging into firmware and platform behavior, building repeatable tests, and collaborating to close test gaps and bugs fast. You think in terms of reproducible results and automation, take pride in clear triage artifacts, and communicate effectively with architects, validation engineers, and software teams.  You are willing to challenge the status quo to find smarter, higher leverage ways to validate firmware and systems features (including exploring AI assisted tooling and test generation).

KEY RESPONSIBILITIES:  

• Partner with firmware architects and validation teams to define platform level firmware test strategies and coverage goals. 
• Evaluate per feature verification criteria and review previous generation test plans to scope, define and develop test cases for next gen products that can run on pre-silicon (SIMICs like simulation models) or post-silicon environments 
• Implement end-to-end test flows that validate firmware functionality across boot and runtime, producing repeatable artifacts (logs, register dumps, SOL captures) for effective triage and defect closure 
• Help generate requirements to enhance simulation platforms so much of post silicon level tests can be exercised on pre-silicon environments 
• Execute tests, debug failures, and collaborate with firmware developers to drive timely defect resolution 
• Contribute to test strategy and coverage analysis, with emphasis on system-level firmware / hardware interactions and cross-domain dependencies. 
• Enhance test infrastructure to improve test coverage, execution efficiency, and optimize reporting/triage workflows. 
• Typical effort split: ~80% test design & development, ~20% execution & troubleshooting.

PREFERRED EXPERIENCE:  

• Demonstrated experience using AI-assisted engineering tools such as GitHub Copilot, Microsoft Copilot, LLM-based coding assistants, automated test-generation tools, or similar technologies.
• Strong understanding of how generative AI can be applied to software development, test automation, debug analysis, and engineering productivity.
• Experience developing AI-assisted automation workflows, agent-based systems, or data-driven validation frameworks is highly desirable.

• Relevant experience in firmware/software development, validation, or test development.
• Strong communicator and collaborator; comfortable working in cross functional teams

• Strong foundation in computer architecture and enterprise server platform features, hands-on experience with SoC validation or system level bring up and low-level debugging.

• Proven ability to scope pre-silicon tests and work with simulation/emulation teams to make virtual platforms useful for system level validation. Knowledge of Simics or equivalent full system simulators is a significant plus
• Practical experience writing test code and tools in C and/or C++, and scripting in Python, Perl or Bash
• Experience or knowledge in one or more of the following areas is highly desirable (with emphasis on system/firmware development or testability):
• BIOS / UEFI concepts (e.g., ACPI, SMBIOS tables, DXE etc)
• RAS (Reliability, Availability, and Serviceability) features and validation
• Memory subsystem validation (DDR, persistent memory, error injection, etc.)
• Power management and telemetry
• Platform security features (TPM, SPDM, Secure Boot, RoT-based attestation, PQC etc.)
• Virtualization and firmware enablement (ACPI, SR-IOV, etc.)
• High-speed I/O validation (PCIe, CXL)
• Sideband protocols (MCTP, SPDM, PLDM, RDE, etc.)

ACADEMIC CREDENTIALS:  

Bachelor's or master's degree in related discipline preferred 

LOCATION:

Austin, TX 

Santa Clara, CA

This role is not eligible for visa sponsorship.

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position.  AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.