GPU Design Verification Engineer

Summary

Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC)! You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices! The GPU Design Verification Engineer will be responsible for the pre-silicon RTL verification of sub-units in the Apple GPU. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design.

Minimum Qualifications

Computer Architecture or Computer systems course work Experience with Hardware Description languages like Verilog or System Verilog Experience with Object Oriented Programming Languages and Data Structures. BS degree in CE, CS or EE

Preferred Qualifications

Background in CPU or GPU architecture Knowledge of GPU pipeline architecture Design Verification course work with experience in verification languages such as SystemVerilog Experience with HDL simulators and waveform viewers. Strong fundamental software and programming skills Experience with Perl, Ruby, Shell scripting, Makefiles

Description

The GPU Design Verification team is responsible for verification of sub-blocks within Apple GPU. This role will grow your expertise in both software engineering as well as graphics hardware architecture and µ-architecture. As a member of this team, you will be responsible for authoring test plans for block level functionality, architecting and developing highly complex verification software components, and working closely with design team members in debugging and closing the blocks you own. You will be able to work on testbenches ranging from sub-blocks, blocks to subsystems containing multiple blocks.