Device Engineer

Background

Driven by strong and growing demand for power semiconductor devices, particularly in AI-related applications, improving factory productivity has become an urgent priority.

We are seeking talented engineers who can contribute broadly as Device Engineering / Process Integration Engineers, supporting activities ranging from new technology development and new product introduction to yield/quality improvement of mass production products, process optimization, cost reduction, and troubleshooting.

Qualifications (Required)

• 　Bachelor’s degree or higher in engineering or a related field
•  Experience in device engineering or process integration in a semiconductor wafer fabrication environment (Minimum ~5 years)
•  Fundamental knowledge of IC processes, device physics, electrical characteristics/testing, analog IC circuits, and reliability
•  Understanding of product specifications (SPEC) and design margin concepts
•  Hands-on experience in data analysis (yield, electrical characteristics, defect/failure analysis) and strong problem-solving skills
•  Practical experience in identifying root causes and implementing corrective actions for yield loss or performance issues
•  Experience leading cross-functional projects involving manufacturing, process engineering, design/product development, quality, and backend operations
•  Ability to communicate effectively in English (email and web meetings) with global teams and U.S. headquarters 
  • Business-level English proficiency (e.g., TOEIC score of ~600 or higher)
• 　Japanese language proficiency (equivalent to JLPT N2 level or above)
•  Valid work authorization that permits employment in Japan at the time of application
• 　No visa sponsorship available for this position

Preferred Qualifications

•  Experience as a technical lead or engineer in new technology development or technology transfer projects 
•  Experience in semiconductor circuit design, device simulation, or test development 
•  Knowledge and hands-on experience with semiconductor front-end processes and equipment 
•  Leadership experience in yield improvement or process optimization projects 
•  Ability to communicate effectively in technical discussions in English meetings 
•  Experience working in a multinational or global company environment is a plus
• Experience in driving process optimization and business improvement using AI technologies

Ideal Candidate Profile

• 　Continuously improves personal skills and can adapt to broader and deeper technical responsibilities 
•  Understands factory and departmental KPIs and is committed to achieving them 
•  Demonstrates strong ownership of products/technologies and drives problem-solving and improvements through to completion 
•  Able to identify root causes and solve problems logically and systematically 
•  Proactively identifies risks and implements preventive actions through risk assessment 
•  Effectively communicates and collaborates across teams, influencing and leading stakeholders 
•  Demonstrates flexibility and a positive attitude toward change and new technologies 
•  Possesses a customer-oriented mindset and understands on-site realities, making decisions based on overall optimization rather than partial optimization

Roles & Responsibilities

In an 8-inch wafer fabrication facility, you will act as a technology owner for Analog IC processes, leveraging expertise in device engineering and process integration to drive development and manufacturing excellence.

•  Lead and execute development and transfer projects for new technologies and new products
•  Improve product quality and yield through process design and optimization from development through mass production
•  Drive continuous improvement of quality, yield, and reliability for existing mass production products, contributing to technology robustness, cost reduction, and productivity enhancement
•  Manage manufacturing conditions for production products (Control Plans, FMEA, SPC)
•  Perform root cause analysis of issues and implement corrective actions based on risk management, including recurrence prevention (8D, FTA, Why-Why analysis, Risk Assessment, etc.)

Key Relationship

•  Direct Report: Manager, Device Engineering Department
•  Key Interfaces: Engineers and managers within Aizu Wafer Fab, Global Engineering Teams