Process Control Defectivity Engineer

Who We Are

Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that we create and service is essential to advancing AI and accelerating the commercialization of next-generation semiconductor chips. Join us and push the boundaries of materials science and engineering in a company at the foundation of the electronics industry. The work we do together advances the world’s technology.

What We Offer

Location:

Singapore,SGP

You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible—while learning every day in a supportive leading global company. Visit our Careers website to learn more. 

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As a Process Engineer, you'll play a crucial role in designing and optimizing manufacturing processes for display and semiconductor manufacturing technologies. You will collect and analyze data, perform hardware characterization, and troubleshoot engineering issues. You'll also measure film properties, generate technical documentation, and engage with customers to resolve concerns. Process Engineers collaborate with vendors and suppliers, and become familiar with implementing new technologies and products. You will experiment, learn, and collaborate with some of the brightest minds in the semiconductor and display industries, partnering with our globally recognized R&D teams on state-of-the-art research and development projects.  

We are seeking a Metrology Engineer specializing in SEMVision defect analysis to strengthen our defect characterization and yield engineering capability. The ideal candidate will possess deep expertise in defect inspection, review, classification and characterize wafer defect; identify root-cause analysis of yield-impacting defects, and drive follow-up Failure Analysis (FA) to confirm defect mechanisms. This role will be instrumental in accelerating defect learning cycles, driving yield enhancement initiatives, and supporting high-volume manufacturing operations.

• Operate SEMVision defect review SEM to review defects detected by brightfield / darkfield inspection tools, and perform high-resolution imaging of defect morphology.
• Classify defects manually and via Automatic Defect Classification (ADC); build, tune, and maintain ADC recipes and defect classification libraries.
• Perform EDX elemental analysis on SEMVision to identify defect composition and likely contamination sources.
• Analyze defect Pareto, wafer maps, spatial signatures, and trends to separate systematic vs. random defects and identify key yield limiters.
• Drive defect root-cause analysis by tracing defects back to the source process step, tool, or chamber using inline data, commonality analysis, and partition / short-loop experiments.
• Define and request follow-up Failure Analysis (FA) — e.g., FIB cross-section, TEM, STEM/EDS, Auger, or SIMS — and interpret results to confirm defect mechanisms.
• Correlate defect data with inline metrology, electrical test (WAT/CP), and yield data to quantify kill ratio and yield impact.
• Collaborate with process integration and module teams (litho, etch, deposition, CMP, clean) to implement corrective actions and verify defect reduction.
• Develop and optimize SEMVision review recipes (sampling, imaging conditions, review strategy) to improve review throughput and capture rate.
• Prepare clear defect reports and present findings, root-cause conclusions, and recommended actions to cross-functional teams.
• Support tool qualification, baseline defect monitoring, and excursion response activities.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related field.
• 2+ years of experience in semiconductor defect review, yield, process, or FA engineering preferred; strong new graduates with relevant internship or research experience are welcome.
• Basic semiconductor knowledge in process integration — understanding of front-end and back-end process flows (litho, etch, deposition, CMP, implant, clean) and how process steps interact.
• Basic knowledge of yield analysis — defect density, kill ratio, defect Pareto, wafer map signatures, and yield–defect correlation.
• Hands-on experience with SEM / defect review SEM (e.g., SEMVision) and defect inspection tools is a strong plus.
• Familiarity with FA techniques (FIB, TEM, EDX/EDS, Auger, SIMS) and ability to interpret FA results.
• Working knowledge of data analysis tools such as JMP, Excel, Klarity / yield management systems; Python or scripting is a plus.
• Strong analytical and problem-solving skills with a logical, data-driven approach to root-cause analysis.
• Good communication skills with the ability to present technical findings clearly to cross-functional stakeholders.
• Detail-oriented, self-motivated, and able to manage multiple defect investigations in parallel.

Core Competencies

Functional Knowledge

• Applies working knowledge of defect review, defect classification, and FA methodologies to solve yield problems.
• Understands how upstream and downstream process steps interact to generate defects.

Business Expertise

• Understands how defect reduction drives yield, cost, and time-to-ramp, and prioritizes work by yield impact.

Leadership

• Owns defect investigations end-to-end, from SEMVision review through FA to corrective-action verification.

Problem Solving

• Solves defect problems of moderate complexity using structured root-cause methods (e.g., 8D, 5-Why, fishbone) and sound data analysis.

Impact

• Contributes to yield improvement and process stability through timely, accurate defect root-cause identification.

Interpersonal Skills

• Communicates defect findings clearly and works effectively with process, integration, and FA teams to drive closure.

Additional Information

Time Type:

Full time

Employee Type:

Assignee / Regular

Travel:

Yes, 20% of the Time

Relocation Eligible:

No

Applied Materials is an Equal Opportunity Employer. Qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, ancestry, religion, creed, sex, sexual orientation, gender identity, age, disability, veteran or military status, or any other basis prohibited by law.