Senior or Staff Hardware Design Engineer
Powerlattice
Senior or Staff Hardware Design Engineer
Powerlattice
Integrated power-delivery chiplet for compute
About Us
Powerlattice is a well-funded semiconductor start-up company backed by well-known large Silicon Valley VCs. The company is working on the industry’s groundbreaking chiplet solution for a fundamental shift in how high-performance chips get powered, paving the way for the next generation of AI and advanced computing.
About the Role
We are seeking a Senior or Staff Hardware Design Engineer for developing hardware system for Powerlattice’s internal usages and collaborating Powerlattice’s customers on AI/Datacenter motherboard design to enable the adoption Powerlattice’s power chiplets. This individual is responsible for end-end hardware lifecycle, from initial schematic entry to complex PCB design and system bring-up. The ideal candidate combines deep system design expertise with strong cross-functional leadership skills and a proven record of delivering complex hardware systems for data center or enterprise markets.
Key Responsibilities
Define and drive overall hardware system architecture and top-level specifications.
Lead hardware system design and system integration.
Perform high-level feasibility analysis and risk assessment.
Review and approve hardware designs to ensure architectural alignment.
Drive system bring-up strategy and debug execution.
Perform hardware system design.
Conduct schematic design, simulation, analysis, and optimization to meet performance targets.
Provide PCB layout guidance and collaborate closely with PCB layout engineers to ensure design intent is met.
Collaborate with PI/SI engineer to ensure the proper PDN performance.
Participate in design reviews and contribute to design documentation.
Participate in silicon bring-up, characterization, and debugging.
Follow best practices for hardware system design, verification, and signoff.
Qualifications
This role is onsite based in Chandler, AZ
M.S. or Ph.D. in electrical engineering or related fields.
5+ years of hands-on hardware system design experience.
Proven experience as a technical lead or system lead.
Experience in working with supply chain vendors.
Demonstrated leadership and mentorship capabilities.
Preferred Qualifications
Experience in server motherboard design.
Familiarity with power delivery design and component choice for high performance server system.
Good communication skills and ability to work in a collaborative team environment.
Compensation & Benefits
Anticipated annual base salary for Member of Technical Staff: $150,000 - $200,000
Stock option grant and benefits package
Comprehensive benefits package including health, dental, vision, and 401(k)
Integrated power-delivery chiplet for compute
PowerLattice develops power delivery chiplets that sit in the processor package to provide voltage regulation directly at the compute die. The chiplet packages miniaturized on-die inductors, voltage control circuits, a vertical packaging design, and a programmable software layer on a single silicon die to move power delivery closer to the compute core. This near-die integration differs from typical power management by delivering regulatory functions inside the chiplet itself, enabling substantial energy savings and easier scaling across AI accelerators, GPUs, and data-center CPUs. The goal is to improve efficiency and performance for next-generation compute by offering modular, near-die power regulation to hyperscalers, OEMs, and system integrators, with early sampling and trials planned for 2026.
Explore more opportunities at Powerlattice