DDRSS Validation Engineer - RTL + Silicon Debug, ASICS Engineering

Role Overview

We are seeking a highly motivated validation engineer with strong debugging and firmware development skills to support next-generation SoC platforms. This role spanspre-silicon verification, emulation, and post-silicon validation, with a focus ondeep debug in RTL/Verilog environments and hands-on silicon bring-up.

The ideal candidate will bridge the gap between design, DV, and system validation by developing firmware in C and ensuring robust functionality across simulation, emulation, and silicon platforms.

Key Responsibilities

• Driveend-to-end validationof SoC subsystems (DDR, memory controller, cache, interconnect) across:

• • RTL simulation (Verilog/SystemVerilog)
  • Emulation platforms
  • Post-silicon environments

• Performdeep debug of functional issuesincluding:

• • Root-causing failures in RTL simulations and testbenches
  • Debugging firmware-driven flows
  • Analyzing silicon failures (timing, stability, performance)

• Develop and maintain production qualityfirmware in Cto:

• • Manage DDRSS IP sequences through init, frequency and power management.
  • Enable bring-up and feature validation
  • Exercise system-level use cases
  • Support debug and characterization

• Validate firmware across:

• • RTL simulation environments
  • Emulation systems
  • Silicon platforms

• Collaborate cross-functionally with:

• • Design (RTL/architecture teams)
  • DV teams (testbench and coverage alignment)
  • System and silicon validation teams

• Develop tools, debug infrastructure, and automation to improve:

• • Validation efficiency
  • Data collection and analysis
  • Failure triage and turnaround time

Required Qualifications

• 6–9 years of experience in SoC validation, design verification, or post-silicon validation
• Strongdebug skills in Verilog/SystemVerilog simulation environments
• Experience withfirmware development in Cfor embedded systems
• Hands-on experience withsilicon bring-up, debug, and validation
• Experience debugging across multiple platforms (simulation, emulation, silicon)
• Solid understanding of:

• • Computer architecture and SoC subsystems
  • Memory systems (DDR, cache, interconnect)

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