Senior Digital Design Verification Engineer

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Texas Instruments is seeking Design Verification Engineer. In this role you will confirm the accuracy of designs for analog and mixed signal electronic parts, components, or integrated circuitry for analog and mixed signal electronic equipment and other hardware systems before pattern generation/mask development. The role will require working independently from the product development team who designed the devices to confirm adherence to known design rules, procedures, and best practices. Additional job functions include analyzing equipment to establish operating data and conducting experimental tests and evaluating results to confirm the device meets all requirements in the specifications. You may also run software simulations, selecting components and equipment based on analysis of specifications and reliability. As a Design Verification Engineer you may also review vendor capability to support product development. Requires a BS degree or equivalent experience in the design of equipment, components or circuitry.

Who are we and what do we do?

The advanced circuits and power solution business is known for delivering industry leading custom IC system solutions including display and touch power products, charger power products, camera PMICs, power path devices, sensing devices and high-performance communication interface products. Our products integrate precision signal-chain and highly efficient power components in ultra-small form factors that enable TI’s best-in-class customer to translate their ideas to high value products that revolutionize the personal electronics market. 

In this team, you will get to work with, and learn from incredibly talented technical leaders, who have influenced TI technology, productivity and way of working in a creative and impactful way. You will get to directly interact with one of TI’s valued and high-volume customers, by way of intense technical reviews and architecture discussions! 

By enabling designs that are highly impactful to TI revenue and working with a critical customer on a versatile set of products, you will find yourself on an accelerated career path. 
 

About the job

If you are looking to join an ingenious, vigorous & ambitious team that consistently delivers groundbreaking technologies into the custom mobile electronics world, here is an opportunity for you!

What will you be doing in this role?

• Verification Strategy: Drive verification strategy by creating detailed test plans, test cases, and checkers, and developing comprehensive chip-top testbenches.
• UVM Architecture: Develop UVM environments from the ground up, including agents, drivers, monitors, and scoreboards.
• Full-Cycle Execution: Execute RTL and Gate-Level Simulations (GLS). Run regressions and track functional/code coverage (Block, Expression, Toggle, FSM) to ensure 100% closure. Implement SVAs and coverage models for protocols such as I2C, ASI, SPI, and UART.
• Technical Debugging: Resolve complex design and testbench issues using advanced debugging and problem-solving techniques.
• Post-Silicon Support: Collaborate with Product and Application Engineering to support ATE functional pattern generation and silicon characterization.
• Cross-Functional Collaboration: Partner with Architecture, Design, and Firmware teams to ensure successful product execution.

Minimum requirements:

• Minimum education Master's or Bachelor's degree in electrical engineering
• Minimum of 5 years of experience
• Core Competencies: Expertise in SystemVerilog (SV) and UVM methodologies.
• Tools: Proficiency in Cadence environments (e.g., Xcelium, vManager, JasperGold).
• Communication: Strong interpersonal skills for collaborating with global cross-functional teams and stakeholders.
• Formal Verification (FV): Experience with Formal Property Verification (FPV), connectivity checks, and unreachability (UNR) analysis for top-level sign-off.
• CDC/RDC: Proficiency in writing and debugging Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) assertions.
• Low Power Verification: Experience with UPF (Unified Power Format) and power-aware simulations.

Preferred Qualifications:

• Automation: Proven ability to automate verification flows and repetitive tasks using Python, Perl, or Shell scripting.
• Methodology Innovation: Ability to drive improved verification methodologies, collaborate with EDA vendors, and implement AI-driven verification techniques.
• Mixed-Signal: Familiarity with AMS (Analog Mixed-Signal) verification environments is a plus.
• Technical Leadership: Proactive approach to driving results, managing time effectively, and rapidly mastering new systems and processes.
• Collaboration: Strong analytical, interpersonal, and communication skills, with a proven ability to build relationships with global stakeholders and cross-functional teams.