Eliyan

D2D/C2C interconnect IP licensing

Digital Design Engineer

Silicon & ASIC DesignConfirmed live in the last 24 hours

Full-timeNo salary listed

About the Job

Requirements

A bachelor's, master's, or Ph.D. in Electrical Engineering or a related field, or equivalent experience.
At least 5 years of experience in high-speed digital design; retimer, gearbox, or Ethernet PMA/PCS logic experience is preferred.
Strong expertise in RTL and assertion coding with SystemVerilog.
Proficiency in taking RTL through synthesis and producing a PPA-optimized frontend netlist.
Knowledge of Ethernet 802.3 standards clauses related to 100G, 200G, 400G, and 800G, Auto-Negotiation, and Link Training.
Experience integrating third-party mixed-signal IPs.
A proven track record of working in a startup-like environment.

Responsibilities

Design, develop, and/or integrate Ethernet PCS/PMA IPs for data rates of 100G, 200G, 400G, and 800G.
Develop micro-architecture specifications and implement digital designs using SystemVerilog.
Ensure compliance with Ethernet standards (IEEE 802.3).
Optimize designs for power, area, and performance.
Collaborate with verification engineers on IP verification.
Work closely with the physical design team on physical implementation.
Participate in design reviews and ensure design quality.
Develop and maintain IP design collateral, including documentation, RTL, SDC constraints, power intent definitions (UPF/CPF), and LINT/CDC rule files and waivers.
Stay up to date with industry trends, emerging technologies, and progress in standards bodies.

Desired Qualifications

Knowledge of DRAM controllers/PHYs and HBM memory.

Join the leading chiplet startup! As an Eliyan digital designer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be developing micro-architecture specifications and RTL design descriptions for best-in-class PHYs and Controllers. You will work with a cross-functional team of experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits. MUST BE WILLING TO WORK ONSITE - M-F

Key Responsibilities

Design, develop and/or integrate Ethernet PCS/PMA IPs for various data rates (100/200/400/800G)
Develop micro-architecture specifications and implement digital designs using SystemVerilog
Ensure compliance with Ethernet standards (IEEE 802.3)
Optimize designs for power, area, and performance
Collaborate with verification engineers for IP verification
Work closely with physical design team for physical implementation
Participate in design reviews and ensure design quality
Develop and maintain all IP design collaterals that include documentation, RTL, SDC constraints, power intent definition (UPF/CPF), LINT/CDC rule files and waivers
Stay up to date with industry trends, emerging technologies and progress in standards’ bodies

Qualifications

Bachelors or Masters or Ph.D in Electrical Engineering and related fields, or equivalent
5+ years of experience in high-speed digital design (preferably in retimer, gearbox, Ethernet PMA/PCS logic)
Strong expertise in RTL and Assertion coding with SystemVerilog
Proficiency in taking RTL through synthesis and produce a PPA optimized frontend netlist
Knowledge of Ethernet 802.3 standards’ clauses related to 100G/200G/400G/800G, Auto-Negotiation and Link Training
Strong bias for innovations across all aspects of digital design including automation of mundane activities and methods for quality improvement
Experience integrating 3rd party mixed signal IPs
Proven track record of being part of a start-up like environment
Knowledge of DRAM Controllers/PHYs and HBM Memory a plus

About the Company

Eliyan

D2D/C2C interconnect IP licensing

Eliyan provides high-performance interconnect IP and chiplets for chiplet-based systems, including NuLink PHY for die-to-die and chip-to-chip connections and NuGear memory/I O chips, plus a Universal Memory Interface. Its NuLink uses simultaneous bidirectional signaling on a single wire to achieve high bandwidth while staying compatible with standards like UCIe and BoW and using standard organic substrates. The company licenses its IP to chip makers rather than selling completed hardware, focusing on reducing cost, simplifying supply chains, and boosting system-level performance for data centers, AI accelerators, and HPC workloads. Eliyan aims to enable scalable, flexible multi-die designs that can connect to different memory types (HBM, GDDR, DDR) across future process nodes.

Company size: 51-200
Company stage: Series C
Total funding: $295M
Headquarters: Santa Clara, CA
Founded: 2021

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